Received-SPF: pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
From:   Alexander Stein <alexander.stein@ew.tq-group.com>
To:     Herbert Xu <herbert@gondor.apana.org.au>,
        linux-arm-kernel@lists.infradead.org
Cc:     linux-crypto@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org, Martin Kaiser <martin@kaiser.cx>,
        Martin Kaiser <martin@kaiser.cx>
Subject: Re: [PATCH 3/3] hwrng: imx-rngc - use polling to wait for end of seeding
Date:   Wed, 23 Aug 2023 07:33:30 +0200
Message-ID: <5662754.31r3eYUQgx@steina-w>
Organization: TQ-Systems GmbH
In-Reply-To: <20230822152553.190858-4-martin@kaiser.cx>
References: <20230822152553.190858-1-martin@kaiser.cx> <20230822152553.190858-4-martin@kaiser.cx>
MIME-Version: 1.0
Content-Transfer-Encoding: quoted-printable
Content-Type: text/plain; charset="iso-8859-1"
Precedence: bulk

Am Dienstag, 22. August 2023, 17:25:53 CEST schrieb Martin Kaiser:
> Use polling to wait until the imx-rngc is properly seeded.

What is the benefit of burning CPU cycles while waiting for hardware?

> We do this only in the init function when the imx-rngc becomes active.
> Polling is ok at this time, there's nothing else we could do while
> we're waiting.
>=20
> We can now remove the code for the interrupt and the completion.

Please split the change to polling and IRQ removal into two patches.

> Signed-off-by: Martin Kaiser <martin@kaiser.cx>
> ---
>  drivers/char/hw_random/imx-rngc.c | 81 ++++---------------------------
>  1 file changed, 9 insertions(+), 72 deletions(-)
>=20
> diff --git a/drivers/char/hw_random/imx-rngc.c
> b/drivers/char/hw_random/imx-rngc.c index d2df468fd460..7ab9aada72d0 1006=
44
> --- a/drivers/char/hw_random/imx-rngc.c
> +++ b/drivers/char/hw_random/imx-rngc.c
> @@ -63,12 +63,6 @@ struct imx_rngc {
>  	struct clk		*clk;
>  	void __iomem		*base;
>  	struct hwrng		rng;
> -	struct completion	rng_op_done;
> -	/*
> -	 * err_reg is written only by the irq handler and read only
> -	 * when interrupts are masked, we need no spinlock
> -	 */
> -	u32			err_reg;
>  };
>=20
>=20
> @@ -91,15 +85,6 @@ static inline void imx_rngc_irq_mask_clear(struct
> imx_rngc *rngc) writel(cmd, rngc->base + RNGC_COMMAND);
>  }
>=20
> -static inline void imx_rngc_irq_unmask(struct imx_rngc *rngc)
> -{
> -	u32 ctrl;
> -
> -	ctrl =3D readl(rngc->base + RNGC_CONTROL);
> -	ctrl &=3D ~(RNGC_CTRL_MASK_DONE | RNGC_CTRL_MASK_ERROR);
> -	writel(ctrl, rngc->base + RNGC_CONTROL);
> -}
> -
>  static int imx_rngc_self_test(struct imx_rngc *rngc)
>  {
>  	u32 cmd, status;
> @@ -143,56 +128,32 @@ static int imx_rngc_read(struct hwrng *rng, void
> *data, size_t max, bool wait) return retval ? retval : -EIO;
>  }
>=20
> -static irqreturn_t imx_rngc_irq(int irq, void *priv)
> -{
> -	struct imx_rngc *rngc =3D (struct imx_rngc *)priv;
> -	u32 status;
> -
> -	/*
> -	 * clearing the interrupt will also clear the error register
> -	 * read error and status before clearing
> -	 */
> -	status =3D readl(rngc->base + RNGC_STATUS);
> -	rngc->err_reg =3D readl(rngc->base + RNGC_ERROR);
> -
> -	imx_rngc_irq_mask_clear(rngc);
> -
> -	if (status & (RNGC_STATUS_SEED_DONE | RNGC_STATUS_ST_DONE))
> -		complete(&rngc->rng_op_done);
> -
> -	return IRQ_HANDLED;
> -}
> -
>  static int imx_rngc_init(struct hwrng *rng)
>  {
>  	struct imx_rngc *rngc =3D container_of(rng, struct imx_rngc, rng);
> -	u32 cmd, ctrl;
> +	u32 cmd, ctrl, status, err_reg;
>  	int ret;
>=20
>  	/* clear error */
>  	cmd =3D readl(rngc->base + RNGC_COMMAND);
>  	writel(cmd | RNGC_CMD_CLR_ERR, rngc->base + RNGC_COMMAND);
>=20
> -	imx_rngc_irq_unmask(rngc);
> -
>  	/* create seed, repeat while there is some statistical error */
>  	do {
>  		/* seed creation */
>  		cmd =3D readl(rngc->base + RNGC_COMMAND);
>  		writel(cmd | RNGC_CMD_SEED, rngc->base + RNGC_COMMAND);
>=20
> -		ret =3D wait_for_completion_timeout(&rngc->rng_op_done,
> msecs_to_jiffies(RNGC_TIMEOUT)); -		if (!ret) {
> -			ret =3D -ETIMEDOUT;
> -			goto err;
> -		}
> +		ret =3D readl_poll_timeout(rngc->base + RNGC_STATUS, status,
> +					 status &=20
RNGC_STATUS_SEED_DONE, 1000, RNGC_TIMEOUT * 1000);

So you want to poll for up to 3s?

Best regards,
Alexander

> +		if (ret < 0)
> +			return ret;
>=20
> -	} while (rngc->err_reg =3D=3D RNGC_ERROR_STATUS_STAT_ERR);
> +		err_reg =3D readl(rngc->base + RNGC_ERROR);
> +	} while (err_reg =3D=3D RNGC_ERROR_STATUS_STAT_ERR);
>=20
> -	if (rngc->err_reg) {
> -		ret =3D -EIO;
> -		goto err;
> -	}
> +	if (err_reg)
> +		return -EIO;
>=20
>  	/*
>  	 * enable automatic seeding, the rngc creates a new seed=20
automatically
> @@ -202,23 +163,7 @@ static int imx_rngc_init(struct hwrng *rng)
>  	ctrl |=3D RNGC_CTRL_AUTO_SEED;
>  	writel(ctrl, rngc->base + RNGC_CONTROL);
>=20
> -	/*
> -	 * if initialisation was successful, we keep the interrupt
> -	 * unmasked until imx_rngc_cleanup is called
> -	 * we mask the interrupt ourselves if we return an error
> -	 */
>  	return 0;
> -
> -err:
> -	imx_rngc_irq_mask_clear(rngc);
> -	return ret;
> -}
> -
> -static void imx_rngc_cleanup(struct hwrng *rng)
> -{
> -	struct imx_rngc *rngc =3D container_of(rng, struct imx_rngc, rng);
> -
> -	imx_rngc_irq_mask_clear(rngc);
>  }
>=20
>  static int __init imx_rngc_probe(struct platform_device *pdev)
> @@ -254,12 +199,9 @@ static int __init imx_rngc_probe(struct platform_dev=
ice
> *pdev) if (rng_type !=3D RNGC_TYPE_RNGC && rng_type !=3D RNGC_TYPE_RNGB)
>  		return -ENODEV;
>=20
> -	init_completion(&rngc->rng_op_done);
> -
>  	rngc->rng.name =3D pdev->name;
>  	rngc->rng.init =3D imx_rngc_init;
>  	rngc->rng.read =3D imx_rngc_read;
> -	rngc->rng.cleanup =3D imx_rngc_cleanup;
>  	rngc->rng.quality =3D 19;
>=20
>  	rngc->dev =3D &pdev->dev;
> @@ -267,11 +209,6 @@ static int __init imx_rngc_probe(struct platform_dev=
ice
> *pdev)
>=20
>  	imx_rngc_irq_mask_clear(rngc);
>=20
> -	ret =3D devm_request_irq(&pdev->dev,
> -			irq, imx_rngc_irq, 0, pdev->name, (void *)rngc);
> -	if (ret)
> -		return dev_err_probe(&pdev->dev, ret, "Can't get interrupt=20
working.\n");
> -
>  	if (self_test) {
>  		ret =3D imx_rngc_self_test(rngc);
>  		if (ret)


=2D-=20
TQ-Systems GmbH | M=FChlstra=DFe 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht M=FCnchen, HRB 105018
Gesch=E4ftsf=FChrer: Detlef Schneider, R=FCdiger Stahl, Stefan Schneider
http://www.tq-group.com/