Received: by 2002:a05:7412:251c:b0:e2:908c:2ebd with SMTP id w28csp599173rda; Sun, 22 Oct 2023 01:19:15 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEaNBLljNQuZn0jEh2XBmaQYAejZdqVTVlsQIQ/goUXmQU+DS9g3M4FhktR5B4gmdThr0ZC X-Received: by 2002:a05:6358:4321:b0:135:a10e:1ed0 with SMTP id r33-20020a056358432100b00135a10e1ed0mr7854674rwc.23.1697962755575; Sun, 22 Oct 2023 01:19:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697962755; cv=none; d=google.com; s=arc-20160816; b=m3ueiIwbdTYZP8TItJUABDXRZehX4MMfzQKobRz+rzoMVJt+CRLKtL96vOc73hbxvF A2WuUa/42Jy8RWWo9E3hSn9XYgxS9ZC+64eKX20mU7xRmSkqgQuU+qTeTeoeL7OYXTaF kpy0fODkJAOT3voDPT1X0kXECVcDTkyp6I/MeocyfkHtksV1kLMbApObBboVpnQ+eicg 9hNU97VryQtuvw0Baf7xVg/411ngbC0GxHvES7Gp7EZ3fuR+Xel3hzTiLOi+OFLUvj4C kkrBUEgEvRWprFgH8csCUfhQ4648iQxTmB55DpUrdkht8xldPiYr+9mHzYNZAAcZs3w3 yOMA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=rmtscBdWOLxjPqHTWTbwIYEeTXD/rA+xJWlci+XLbiQ=; fh=uKl1CTlin8qnxt56ErGp3UOINPCBskOXHDuKvJLDQbo=; b=vbCIyd7CTy22PMyN/GpaGvY3WR6K2ShyAGm3WffJoBr/YzRP82QOpZhpzH7EdnI+bd UVRTbm7Z2LVZpWaXltRTKUGKUutTRCpTvpmtqv41XMcqUD7KZjHge3v07gBbr++pDHvE KRbA6/jNaFbGK5ynQeBmDaeua6Rrrtm5UbuCdT/rNuv8wm33KKvtZnzRnFTwC+M1C7ho jdvCO1SHVjrmtXUeIDggf1Yol270hHZJjSymvr0klBWPXrgsLH2YxkdGeSJC/fz7WzXc bmZcCEf3fS7T/BY2nZ55ktV5SDqFwABHdx7Iuzx62xCleqsA3d80dOevgZXDKyZVj1LB kXlQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=dCjVk8Ev; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from pete.vger.email (pete.vger.email. [23.128.96.36]) by mx.google.com with ESMTPS id i5-20020a633c45000000b00574166b7d34si4538916pgn.881.2023.10.22.01.19.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 Oct 2023 01:19:15 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) client-ip=23.128.96.36; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=dCjVk8Ev; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by pete.vger.email (Postfix) with ESMTP id EE6CC8057473; Sun, 22 Oct 2023 01:19:10 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at pete.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231622AbjJVIS7 (ORCPT + 99 others); Sun, 22 Oct 2023 04:18:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37252 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231616AbjJVISt (ORCPT ); Sun, 22 Oct 2023 04:18:49 -0400 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 975CBCF for ; Sun, 22 Oct 2023 01:18:46 -0700 (PDT) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 663F9C433CA for ; Sun, 22 Oct 2023 08:18:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1697962726; bh=BCF/IKknJGOxDyL3q/kFif5oBmpkW4H+u9uUhiQNKGQ=; h=From:To:Subject:Date:In-Reply-To:References:From; b=dCjVk8Evzos/U2XOb73dRrrAjDEX1tGQzlC09kLYTptC7Z7F82oVbyS7430Pqy+Uq dP/xyN1CsoiTKJNZaSa7NRkDevazmWfTO8LIETwe7Tmh4z+sIEmOfxBfvfsB8udYO5 d4OJZwPjUD9vOIb7RnRDsljpi54x+mwPGCUEYkLAT5FpIAJ9/ieN2AGy4ftjolt9Lp LsiR07s74ZUPOKrfrPOzxYjlz/TfKOKRt/hTKfJsdoonIwvGUjPaq6ZM21xIjRqQBf VkDFLHo1fvjawePtKQ2uLEIGKpZ0gshdt6SBJQlvrCAlriTUYU0x4Vq7i9w/3nqNDP zR8ntNDad/zDw== From: Eric Biggers To: linux-crypto@vger.kernel.org Subject: [PATCH 13/30] crypto: stm32 - remove unnecessary alignmask for ahashes Date: Sun, 22 Oct 2023 01:10:43 -0700 Message-ID: <20231022081100.123613-14-ebiggers@kernel.org> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231022081100.123613-1-ebiggers@kernel.org> References: <20231022081100.123613-1-ebiggers@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Sun, 22 Oct 2023 01:19:11 -0700 (PDT) From: Eric Biggers The crypto API's support for alignmasks for ahash algorithms is nearly useless, as its only effect is to cause the API to align the key and result buffers. The drivers that happen to be specifying an alignmask for ahash rarely actually need it. When they do, it's easily fixable, especially considering that these buffers cannot be used for DMA. In preparation for removing alignmask support from ahash, this patch makes the stm32 driver no longer use it. This driver didn't actually rely on it; it only writes to the result buffer in stm32_hash_finish(), simply using memcpy(). And stm32_hash_setkey() does not assume any alignment for the key buffer. Signed-off-by: Eric Biggers --- drivers/crypto/stm32/stm32-hash.c | 20 -------------------- 1 file changed, 20 deletions(-) diff --git a/drivers/crypto/stm32/stm32-hash.c b/drivers/crypto/stm32/stm32-hash.c index 2b2382d4332c5..34e0d7e381a8c 100644 --- a/drivers/crypto/stm32/stm32-hash.c +++ b/drivers/crypto/stm32/stm32-hash.c @@ -1276,21 +1276,20 @@ static struct ahash_engine_alg algs_md5[] = { .digestsize = MD5_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { .cra_name = "md5", .cra_driver_name = "stm32-md5", .cra_priority = 200, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY, .cra_blocksize = MD5_HMAC_BLOCK_SIZE, .cra_ctxsize = sizeof(struct stm32_hash_ctx), - .cra_alignmask = 3, .cra_init = stm32_hash_cra_init, .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } }, .op = { .do_one_request = stm32_hash_one_request, }, }, { @@ -1306,21 +1305,20 @@ static struct ahash_engine_alg algs_md5[] = { .digestsize = MD5_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { .cra_name = "hmac(md5)", .cra_driver_name = "stm32-hmac-md5", .cra_priority = 200, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY, .cra_blocksize = MD5_HMAC_BLOCK_SIZE, .cra_ctxsize = sizeof(struct stm32_hash_ctx), - .cra_alignmask = 3, .cra_init = stm32_hash_cra_hmac_init, .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } }, .op = { .do_one_request = stm32_hash_one_request, }, } }; @@ -1338,21 +1336,20 @@ static struct ahash_engine_alg algs_sha1[] = { .digestsize = SHA1_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { .cra_name = "sha1", .cra_driver_name = "stm32-sha1", .cra_priority = 200, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY, .cra_blocksize = SHA1_BLOCK_SIZE, .cra_ctxsize = sizeof(struct stm32_hash_ctx), - .cra_alignmask = 3, .cra_init = stm32_hash_cra_init, .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } }, .op = { .do_one_request = stm32_hash_one_request, }, }, { @@ -1368,21 +1365,20 @@ static struct ahash_engine_alg algs_sha1[] = { .digestsize = SHA1_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { .cra_name = "hmac(sha1)", .cra_driver_name = "stm32-hmac-sha1", .cra_priority = 200, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY, .cra_blocksize = SHA1_BLOCK_SIZE, .cra_ctxsize = sizeof(struct stm32_hash_ctx), - .cra_alignmask = 3, .cra_init = stm32_hash_cra_hmac_init, .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } }, .op = { .do_one_request = stm32_hash_one_request, }, }, }; @@ -1400,21 +1396,20 @@ static struct ahash_engine_alg algs_sha224[] = { .digestsize = SHA224_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { .cra_name = "sha224", .cra_driver_name = "stm32-sha224", .cra_priority = 200, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY, .cra_blocksize = SHA224_BLOCK_SIZE, .cra_ctxsize = sizeof(struct stm32_hash_ctx), - .cra_alignmask = 3, .cra_init = stm32_hash_cra_init, .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } }, .op = { .do_one_request = stm32_hash_one_request, }, }, { @@ -1430,21 +1425,20 @@ static struct ahash_engine_alg algs_sha224[] = { .digestsize = SHA224_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { .cra_name = "hmac(sha224)", .cra_driver_name = "stm32-hmac-sha224", .cra_priority = 200, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY, .cra_blocksize = SHA224_BLOCK_SIZE, .cra_ctxsize = sizeof(struct stm32_hash_ctx), - .cra_alignmask = 3, .cra_init = stm32_hash_cra_hmac_init, .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } }, .op = { .do_one_request = stm32_hash_one_request, }, }, }; @@ -1462,21 +1456,20 @@ static struct ahash_engine_alg algs_sha256[] = { .digestsize = SHA256_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { .cra_name = "sha256", .cra_driver_name = "stm32-sha256", .cra_priority = 200, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY, .cra_blocksize = SHA256_BLOCK_SIZE, .cra_ctxsize = sizeof(struct stm32_hash_ctx), - .cra_alignmask = 3, .cra_init = stm32_hash_cra_init, .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } }, .op = { .do_one_request = stm32_hash_one_request, }, }, { @@ -1492,21 +1485,20 @@ static struct ahash_engine_alg algs_sha256[] = { .digestsize = SHA256_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { .cra_name = "hmac(sha256)", .cra_driver_name = "stm32-hmac-sha256", .cra_priority = 200, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY, .cra_blocksize = SHA256_BLOCK_SIZE, .cra_ctxsize = sizeof(struct stm32_hash_ctx), - .cra_alignmask = 3, .cra_init = stm32_hash_cra_hmac_init, .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } }, .op = { .do_one_request = stm32_hash_one_request, }, }, }; @@ -1524,21 +1516,20 @@ static struct ahash_engine_alg algs_sha384_sha512[] = { .digestsize = SHA384_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { .cra_name = "sha384", .cra_driver_name = "stm32-sha384", .cra_priority = 200, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY, .cra_blocksize = SHA384_BLOCK_SIZE, .cra_ctxsize = sizeof(struct stm32_hash_ctx), - .cra_alignmask = 3, .cra_init = stm32_hash_cra_init, .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } }, .op = { .do_one_request = stm32_hash_one_request, }, }, { @@ -1554,21 +1545,20 @@ static struct ahash_engine_alg algs_sha384_sha512[] = { .digestsize = SHA384_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { .cra_name = "hmac(sha384)", .cra_driver_name = "stm32-hmac-sha384", .cra_priority = 200, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY, .cra_blocksize = SHA384_BLOCK_SIZE, .cra_ctxsize = sizeof(struct stm32_hash_ctx), - .cra_alignmask = 3, .cra_init = stm32_hash_cra_hmac_init, .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } }, .op = { .do_one_request = stm32_hash_one_request, }, }, { @@ -1583,21 +1573,20 @@ static struct ahash_engine_alg algs_sha384_sha512[] = { .digestsize = SHA512_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { .cra_name = "sha512", .cra_driver_name = "stm32-sha512", .cra_priority = 200, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY, .cra_blocksize = SHA512_BLOCK_SIZE, .cra_ctxsize = sizeof(struct stm32_hash_ctx), - .cra_alignmask = 3, .cra_init = stm32_hash_cra_init, .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } }, .op = { .do_one_request = stm32_hash_one_request, }, }, { @@ -1613,21 +1602,20 @@ static struct ahash_engine_alg algs_sha384_sha512[] = { .digestsize = SHA512_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { .cra_name = "hmac(sha512)", .cra_driver_name = "stm32-hmac-sha512", .cra_priority = 200, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY, .cra_blocksize = SHA512_BLOCK_SIZE, .cra_ctxsize = sizeof(struct stm32_hash_ctx), - .cra_alignmask = 3, .cra_init = stm32_hash_cra_hmac_init, .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } }, .op = { .do_one_request = stm32_hash_one_request, }, }, }; @@ -1645,21 +1633,20 @@ static struct ahash_engine_alg algs_sha3[] = { .digestsize = SHA3_224_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { .cra_name = "sha3-224", .cra_driver_name = "stm32-sha3-224", .cra_priority = 200, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY, .cra_blocksize = SHA3_224_BLOCK_SIZE, .cra_ctxsize = sizeof(struct stm32_hash_ctx), - .cra_alignmask = 3, .cra_init = stm32_hash_cra_sha3_init, .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } }, .op = { .do_one_request = stm32_hash_one_request, }, }, { @@ -1675,21 +1662,20 @@ static struct ahash_engine_alg algs_sha3[] = { .digestsize = SHA3_224_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { .cra_name = "hmac(sha3-224)", .cra_driver_name = "stm32-hmac-sha3-224", .cra_priority = 200, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY, .cra_blocksize = SHA3_224_BLOCK_SIZE, .cra_ctxsize = sizeof(struct stm32_hash_ctx), - .cra_alignmask = 3, .cra_init = stm32_hash_cra_sha3_hmac_init, .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } }, .op = { .do_one_request = stm32_hash_one_request, }, }, { @@ -1704,21 +1690,20 @@ static struct ahash_engine_alg algs_sha3[] = { .digestsize = SHA3_256_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { .cra_name = "sha3-256", .cra_driver_name = "stm32-sha3-256", .cra_priority = 200, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY, .cra_blocksize = SHA3_256_BLOCK_SIZE, .cra_ctxsize = sizeof(struct stm32_hash_ctx), - .cra_alignmask = 3, .cra_init = stm32_hash_cra_sha3_init, .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } }, .op = { .do_one_request = stm32_hash_one_request, }, }, { @@ -1734,21 +1719,20 @@ static struct ahash_engine_alg algs_sha3[] = { .digestsize = SHA3_256_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { .cra_name = "hmac(sha3-256)", .cra_driver_name = "stm32-hmac-sha3-256", .cra_priority = 200, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY, .cra_blocksize = SHA3_256_BLOCK_SIZE, .cra_ctxsize = sizeof(struct stm32_hash_ctx), - .cra_alignmask = 3, .cra_init = stm32_hash_cra_sha3_hmac_init, .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } }, .op = { .do_one_request = stm32_hash_one_request, }, }, { @@ -1763,21 +1747,20 @@ static struct ahash_engine_alg algs_sha3[] = { .digestsize = SHA3_384_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { .cra_name = "sha3-384", .cra_driver_name = "stm32-sha3-384", .cra_priority = 200, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY, .cra_blocksize = SHA3_384_BLOCK_SIZE, .cra_ctxsize = sizeof(struct stm32_hash_ctx), - .cra_alignmask = 3, .cra_init = stm32_hash_cra_sha3_init, .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } }, .op = { .do_one_request = stm32_hash_one_request, }, }, { @@ -1793,21 +1776,20 @@ static struct ahash_engine_alg algs_sha3[] = { .digestsize = SHA3_384_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { .cra_name = "hmac(sha3-384)", .cra_driver_name = "stm32-hmac-sha3-384", .cra_priority = 200, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY, .cra_blocksize = SHA3_384_BLOCK_SIZE, .cra_ctxsize = sizeof(struct stm32_hash_ctx), - .cra_alignmask = 3, .cra_init = stm32_hash_cra_sha3_hmac_init, .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } }, .op = { .do_one_request = stm32_hash_one_request, }, }, { @@ -1822,21 +1804,20 @@ static struct ahash_engine_alg algs_sha3[] = { .digestsize = SHA3_512_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { .cra_name = "sha3-512", .cra_driver_name = "stm32-sha3-512", .cra_priority = 200, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY, .cra_blocksize = SHA3_512_BLOCK_SIZE, .cra_ctxsize = sizeof(struct stm32_hash_ctx), - .cra_alignmask = 3, .cra_init = stm32_hash_cra_sha3_init, .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } }, .op = { .do_one_request = stm32_hash_one_request, }, }, { @@ -1852,21 +1833,20 @@ static struct ahash_engine_alg algs_sha3[] = { .digestsize = SHA3_512_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { .cra_name = "hmac(sha3-512)", .cra_driver_name = "stm32-hmac-sha3-512", .cra_priority = 200, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY, .cra_blocksize = SHA3_512_BLOCK_SIZE, .cra_ctxsize = sizeof(struct stm32_hash_ctx), - .cra_alignmask = 3, .cra_init = stm32_hash_cra_sha3_hmac_init, .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } }, .op = { .do_one_request = stm32_hash_one_request, }, } }; -- 2.42.0