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([2402:7500:5d5:b5a6:112b:fcd:68ec:f43]) by smtp.gmail.com with ESMTPSA id w6-20020a636206000000b005cd8866cccesm2243473pgb.27.2023.12.21.18.15.06 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 21 Dec 2023 18:15:07 -0800 (PST) Content-Type: text/plain; charset=us-ascii Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 (Mac OS X Mail 11.5 \(3445.9.7\)) Subject: Re: [PATCH] crypto: riscv - use real assembler for vector crypto extensions From: Jerry Shih In-Reply-To: <20231220065648.253236-1-ebiggers@kernel.org> Date: Fri, 22 Dec 2023 10:15:04 +0800 Cc: linux-crypto@vger.kernel.org, linux-riscv@lists.infradead.org, Christoph Muellner Content-Transfer-Encoding: quoted-printable Message-Id: <3C51992F-B8F8-4023-81EE-3C95102B072A@sifive.com> References: <20231220065648.253236-1-ebiggers@kernel.org> To: Eric Biggers X-Mailer: Apple Mail (2.3445.9.7) On Dec 20, 2023, at 14:56, Eric Biggers wrote: > From: Eric Biggers >=20 > LLVM main and binutils master now both fully support v1.0 of the = RISC-V > vector crypto extensions. Therefore, delete riscv.pm and use the real > assembler mnemonics for the vector crypto instructions. >=20 > Signed-off-by: Eric Biggers > --- >=20 > Hi Jerry, this patch applies to your v3 patchset > = (https://lore.kernel.org/linux-crypto/20231205092801.1335-1-jerry.shih@sif= ive.com). > Can you consider folding it into your patchset? Thanks! Thank you for the vector crypto asm mnemonics works. Do you mean that fold this patch or append this one as the separated commit into my next v4 patchset? > arch/riscv/Kconfig | 6 + > arch/riscv/crypto/Kconfig | 16 +- > .../crypto/aes-riscv64-zvkned-zvbb-zvkg.pl | 226 +++++------ > arch/riscv/crypto/aes-riscv64-zvkned-zvkb.pl | 98 ++--- > arch/riscv/crypto/aes-riscv64-zvkned.pl | 314 +++++++-------- > arch/riscv/crypto/chacha-riscv64-zvkb.pl | 34 +- > arch/riscv/crypto/ghash-riscv64-zvkg.pl | 4 +- > arch/riscv/crypto/riscv.pm | 359 ------------------ > .../sha256-riscv64-zvknha_or_zvknhb-zvkb.pl | 101 ++--- > .../crypto/sha512-riscv64-zvknhb-zvkb.pl | 52 +-- > arch/riscv/crypto/sm3-riscv64-zvksh.pl | 86 ++--- > arch/riscv/crypto/sm4-riscv64-zvksed.pl | 62 +-- > 12 files changed, 503 insertions(+), 855 deletions(-) > delete mode 100644 arch/riscv/crypto/riscv.pm >=20 > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index dc51164b8fd4..7267a6345e32 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -531,20 +531,26 @@ config RISCV_ISA_V_PREEMPTIVE > by adding memory on demand for tracking kernel's V-context. >=20 > config TOOLCHAIN_HAS_ZBB > bool > default y > depends on !64BIT || $(cc-option,-mabi=3Dlp64 = -march=3Drv64ima_zbb) > depends on !32BIT || $(cc-option,-mabi=3Dilp32 = -march=3Drv32ima_zbb) > depends on LLD_VERSION >=3D 150000 || LD_VERSION >=3D 23900 > depends on AS_HAS_OPTION_ARCH >=20 > +# This option indicates that the toolchain supports all v1.0 vector = crypto > +# extensions, including Zvk*, Zvbb, and Zvbc. LLVM added all of = these at once. > +# binutils added all except Zvkb, then added Zvkb. So we just check = for Zvkb. > +config TOOLCHAIN_HAS_ZVK > + def_bool $(as-instr, .option arch$(comma) +zvkb) > + Could we rename to other terms like `TOOLCHAIN_HAS_VECTOR_CRYPTO/TOOLCHAIN_HAS_V_CRYPTO `? Some ciphers don't use `ZVK*` extensions. -Jerry