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Fri, 9 Feb 2024 08:23:32 +0000 Received: from DM4PR11MB5502.namprd11.prod.outlook.com ([fe80::3987:8caa:986e:6103]) by DM4PR11MB5502.namprd11.prod.outlook.com ([fe80::3987:8caa:986e:6103%3]) with mapi id 15.20.7249.038; Fri, 9 Feb 2024 08:23:32 +0000 From: "Zeng, Xin" To: Jason Gunthorpe CC: "herbert@gondor.apana.org.au" , "alex.williamson@redhat.com" , "yishaih@nvidia.com" , "shameerali.kolothum.thodi@huawei.com" , "Tian, Kevin" , "linux-crypto@vger.kernel.org" , "kvm@vger.kernel.org" , qat-linux , "Cao, Yahui" Subject: RE: [PATCH 10/10] vfio/qat: Add vfio_pci driver for Intel QAT VF devices Thread-Topic: [PATCH 10/10] vfio/qat: Add vfio_pci driver for Intel QAT VF devices Thread-Index: AQHaVSVFJ9K0TVMQD0C9btTtb+JmirD9TRgAgAQ3vqA= Date: Fri, 9 Feb 2024 08:23:32 +0000 Message-ID: References: <20240201153337.4033490-1-xin.zeng@intel.com> <20240201153337.4033490-11-xin.zeng@intel.com> <20240206125500.GC10476@nvidia.com> In-Reply-To: <20240206125500.GC10476@nvidia.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5502.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 5a1ecf9e-70e5-46a7-ae21-08dc2948672f X-MS-Exchange-CrossTenant-originalarrivaltime: 09 Feb 2024 08:23:32.4787 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Yw3MXR+2PjQXZeYBX1V+CFAekv/zC7AKwNGt2cfRNPcy17ALOwvdkUTpGKxiB+NcCU0mOKhuU2J1amwJJJyyGg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR11MB7499 X-OriginatorOrg: intel.com Thanks for your comments, Jason. On Tuesday, February 6, 2024 8:55 PM, Jason Gunthorpe wrot= e: > > + > > + ops =3D mdev->ops; > > + if (!ops || !ops->init || !ops->cleanup || > > + !ops->open || !ops->close || > > + !ops->save_state || !ops->load_state || > > + !ops->suspend || !ops->resume) { > > + ret =3D -EIO; > > + dev_err(&parent->dev, "Incomplete device migration ops > structure!"); > > + goto err_destroy; > > + } >=20 > Why are there ops pointers here? I would expect this should just be > direct function calls to the PF QAT driver. I indeed had a version where the direct function calls are Implemented in QAT driver, while when I look at the functions, most of them=20 only translate the interface to the ops pointer. That's why I put ops pointers directly into vfio variant driver. >=20 > > +static void qat_vf_pci_aer_reset_done(struct pci_dev *pdev) > > +{ > > + struct qat_vf_core_device *qat_vdev =3D qat_vf_drvdata(pdev); > > + > > + if (!qat_vdev->core_device.vdev.mig_ops) > > + return; > > + > > + /* > > + * As the higher VFIO layers are holding locks across reset and using > > + * those same locks with the mm_lock we need to prevent ABBA > deadlock > > + * with the state_mutex and mm_lock. > > + * In case the state_mutex was taken already we defer the cleanup wor= k > > + * to the unlock flow of the other running context. > > + */ > > + spin_lock(&qat_vdev->reset_lock); > > + qat_vdev->deferred_reset =3D true; > > + if (!mutex_trylock(&qat_vdev->state_mutex)) { > > + spin_unlock(&qat_vdev->reset_lock); > > + return; > > + } > > + spin_unlock(&qat_vdev->reset_lock); > > + qat_vf_state_mutex_unlock(qat_vdev); > > +} >=20 > Do you really need this? I thought this ugly thing was going to be a > uniquely mlx5 thing.. I think that's still required to make the migration state synchronized if the VF is reset by other VFIO emulation paths. Is it the case?=20 BTW, this implementation is not only in mlx5 driver, but also in other Vfio pci variant drivers such as hisilicon acc driver and pds driver. Thanks, Xin