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Date: Tue, 26 Mar 2024 01:18:16 -0700
From: Eric Biggers <ebiggers@kernel.org>
To: Ingo Molnar <mingo@kernel.org>
Cc: linux-crypto@vger.kernel.org, x86@kernel.org,
	linux-kernel@vger.kernel.org, Ard Biesheuvel <ardb@kernel.org>,
	Andy Lutomirski <luto@kernel.org>,
	"Chang S . Bae" <chang.seok.bae@intel.com>
Subject: Re: [PATCH 1/6] x86: add kconfig symbols for assembler VAES and
 VPCLMULQDQ support
Message-ID: <20240326081816.GA431948@sol.localdomain>
References: <20240326080305.402382-1-ebiggers@kernel.org>
 <20240326080305.402382-2-ebiggers@kernel.org>
 <ZgKC5dcqWSEkwuTX@gmail.com>
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On Tue, Mar 26, 2024 at 09:10:13AM +0100, Ingo Molnar wrote:
> 
> * Eric Biggers <ebiggers@kernel.org> wrote:
> 
> > From: Eric Biggers <ebiggers@google.com>
> > 
> > Add config symbols AS_VAES and AS_VPCLMULQDQ that expose whether the
> > assembler supports the vector AES and carryless multiplication
> > cryptographic extensions.
> > 
> > Signed-off-by: Eric Biggers <ebiggers@google.com>
> > ---
> >  arch/x86/Kconfig.assembler | 10 ++++++++++
> >  1 file changed, 10 insertions(+)
> > 
> > diff --git a/arch/x86/Kconfig.assembler b/arch/x86/Kconfig.assembler
> > index 8ad41da301e5..59aedf32c4ea 100644
> > --- a/arch/x86/Kconfig.assembler
> > +++ b/arch/x86/Kconfig.assembler
> > @@ -23,9 +23,19 @@ config AS_TPAUSE
> >  config AS_GFNI
> >  	def_bool $(as-instr,vgf2p8mulb %xmm0$(comma)%xmm1$(comma)%xmm2)
> >  	help
> >  	  Supported by binutils >= 2.30 and LLVM integrated assembler
> >  
> > +config AS_VAES
> > +	def_bool $(as-instr,vaesenc %ymm0$(comma)%ymm1$(comma)%ymm2)
> > +	help
> > +	  Supported by binutils >= 2.30 and LLVM integrated assembler
> 
> Nit: any reason it isn't called AS_VAESENC, like the instruction itself?
> 
> The other new AS_ Kconfig symbols follow the same nomenclature:

The CPU feature flag is called VAES.  It guards the vaesenc, vaesenclast,
vaesdec, and vaesdeclast instructions when used on ymm and zmm registers.

So the name AS_VAES seems fine as-is.

I think you may have been confused by AS_VPCLMULQDQ, because in that case the
feature happens to provides a single instruction with the same name as the CPU
feature flag.

- Eric