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From: David Laight <David.Laight@ACULAB.COM>
To: 'Eric Biggers' <ebiggers@kernel.org>, Ard Biesheuvel <ardb@kernel.org>
CC: "linux-crypto@vger.kernel.org" <linux-crypto@vger.kernel.org>,
	"x86@kernel.org" <x86@kernel.org>, "linux-kernel@vger.kernel.org"
	<linux-kernel@vger.kernel.org>, Andy Lutomirski <luto@kernel.org>, "Chang S .
 Bae" <chang.seok.bae@intel.com>
Subject: RE: [PATCH 0/6] Faster AES-XTS on modern x86_64 CPUs
Thread-Topic: [PATCH 0/6] Faster AES-XTS on modern x86_64 CPUs
Thread-Index: AQHaf518oZDDPKfpuUWrj9ZpRMjHLrFWPMWw
Date: Wed, 3 Apr 2024 08:12:09 +0000
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References: <20240326080305.402382-1-ebiggers@kernel.org>
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From: Eric Biggers
> Sent: 26 March 2024 16:48
....
> Consider Intel Ice Lake for example, these are the AES-256-XTS encryption=
 speeds
> on 4096-byte messages in MB/s I'm seeing:
>=20
>     xts-aes-aesni                  5136
>     xts-aes-aesni-avx              5366
>     xts-aes-vaes-avx2              9337
>     xts-aes-vaes-avx10_256         9876
>     xts-aes-vaes-avx10_512         10215
>=20
> So yes, on that CPU the biggest boost comes just from VAES, staying on AV=
X2.
> But taking advantage of AVX512 does help a bit more, first from the parts=
 other
> than 512-bit registers, then a bit more from 512-bit registers.

How much does the kernel_fpu_begin() cost on real workloads?
(ie when the registers are live and it forces an extra save/restore)

I've not looked at the code but I often see what looks like
excessive inlining in crypto code.
This will speed up benchmarks but can have a negative effect
on real code both because of the time taken to load the
code and the effect of displacing other code.

It might be that this code is a simple loop....

=09David

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