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From: JiaJie Ho <jiajie.ho@starfivetech.com>
To: Herbert Xu <herbert@gondor.apana.org.au>, "David S . Miller"
	<davem@davemloft.net>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski
	<krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>,
	Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>, Vinod Koul
	<vkoul@kernel.org>, "linux-crypto@vger.kernel.org"
	<linux-crypto@vger.kernel.org>, "devicetree@vger.kernel.org"
	<devicetree@vger.kernel.org>, "linux-kernel@vger.kernel.org"
	<linux-kernel@vger.kernel.org>, "dmaengine@vger.kernel.org"
	<dmaengine@vger.kernel.org>
Subject: RE: [PATCH v4 5/7] dmaengine: dw-axi-dmac: Support hardware quirks
Thread-Topic: [PATCH v4 5/7] dmaengine: dw-axi-dmac: Support hardware quirks
Thread-Index: AQHabsw166tT/VAf9kyRtlc3qP/LH7GM+pRQ
Date: Wed, 8 May 2024 02:12:56 +0000
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> Adds separate dma hardware descriptor setup for JH8100 hardware quirks.
> JH8100 engine uses AXI1 master for data transfer but current dma driver i=
s
> hardcoded to use AXI0 only. The FIFO offset needs to be incremented due t=
o
> hardware limitations.
>=20
> Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com>
> ---
>  .../dma/dw-axi-dmac/dw-axi-dmac-platform.c    | 32 ++++++++++++++++---
>  drivers/dma/dw-axi-dmac/dw-axi-dmac.h         |  2 ++
>  include/linux/dma/dw_axi.h                    | 11 +++++++
>  3 files changed, 40 insertions(+), 5 deletions(-)  create mode 100644
> include/linux/dma/dw_axi.h
>=20
> diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
> b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
> index a86a81ff0caa..684cabe33c7d 100644
> --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
> +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
> @@ -647,6 +647,7 @@ static void set_desc_dest_master(struct
> axi_dma_hw_desc *hw_desc,
>=20
>  static int dw_axi_dma_set_hw_desc(struct axi_dma_chan *chan,
>  				  struct axi_dma_hw_desc *hw_desc,
> +				  struct axi_dma_desc *desc,
>  				  dma_addr_t mem_addr, size_t len)
>  {
>  	unsigned int data_width =3D BIT(chan->chip->dw->hdata-
> >m_data_width);
> @@ -655,6 +656,8 @@ static int dw_axi_dma_set_hw_desc(struct
> axi_dma_chan *chan,
>  	dma_addr_t device_addr;
>  	size_t axi_block_ts;
>  	size_t block_ts;
> +	bool hw_quirks =3D chan->quirks & DWAXIDMAC_STARFIVE_SM_ALGO;
> +	u32 val;
>  	u32 ctllo, ctlhi;
>  	u32 burst_len;
>=20
> @@ -675,7 +678,8 @@ static int dw_axi_dma_set_hw_desc(struct
> axi_dma_chan *chan,
>  		device_addr =3D chan->config.dst_addr;
>  		ctllo =3D reg_width << CH_CTL_L_DST_WIDTH_POS |
>  			mem_width << CH_CTL_L_SRC_WIDTH_POS |
> -			DWAXIDMAC_CH_CTL_L_NOINC <<
> CH_CTL_L_DST_INC_POS |
> +			(hw_quirks ? DWAXIDMAC_CH_CTL_L_INC <<
> CH_CTL_L_DST_INC_POS :
> +				     DWAXIDMAC_CH_CTL_L_NOINC <<
> CH_CTL_L_DST_INC_POS) |
>  			DWAXIDMAC_CH_CTL_L_INC <<
> CH_CTL_L_SRC_INC_POS;
>  		block_ts =3D len >> mem_width;
>  		break;
> @@ -685,7 +689,8 @@ static int dw_axi_dma_set_hw_desc(struct
> axi_dma_chan *chan,
>  		ctllo =3D reg_width << CH_CTL_L_SRC_WIDTH_POS |
>  			mem_width << CH_CTL_L_DST_WIDTH_POS |
>  			DWAXIDMAC_CH_CTL_L_INC <<
> CH_CTL_L_DST_INC_POS |
> -			DWAXIDMAC_CH_CTL_L_NOINC <<
> CH_CTL_L_SRC_INC_POS;
> +			(hw_quirks ? DWAXIDMAC_CH_CTL_L_INC <<
> CH_CTL_L_SRC_INC_POS :
> +				     DWAXIDMAC_CH_CTL_L_NOINC <<
> CH_CTL_L_SRC_INC_POS);
>  		block_ts =3D len >> reg_width;
>  		break;
>  	default:
> @@ -726,6 +731,17 @@ static int dw_axi_dma_set_hw_desc(struct
> axi_dma_chan *chan,
>=20
>  	set_desc_src_master(hw_desc);
>=20
> +	if (hw_quirks) {
> +		if (chan->direction =3D=3D DMA_MEM_TO_DEV) {
> +			set_desc_dest_master(hw_desc, desc);
> +		} else {
> +			/* Select AXI1 for src master */
> +			val =3D le32_to_cpu(hw_desc->lli->ctl_lo);
> +			val |=3D CH_CTL_L_SRC_MAST;
> +			hw_desc->lli->ctl_lo =3D cpu_to_le32(val);
> +		}
> +	}
> +
>  	hw_desc->len =3D len;
>  	return 0;
>  }
> @@ -802,8 +818,8 @@ dw_axi_dma_chan_prep_cyclic(struct dma_chan
> *dchan, dma_addr_t dma_addr,
>  	for (i =3D 0; i < total_segments; i++) {
>  		hw_desc =3D &desc->hw_desc[i];
>=20
> -		status =3D dw_axi_dma_set_hw_desc(chan, hw_desc, src_addr,
> -						segment_len);
> +		status =3D dw_axi_dma_set_hw_desc(chan, hw_desc, NULL,
> +						src_addr, segment_len);
>  		if (status < 0)
>  			goto err_desc_get;
>=20
> @@ -885,7 +901,8 @@ dw_axi_dma_chan_prep_slave_sg(struct dma_chan
> *dchan, struct scatterlist *sgl,
>=20
>  		do {
>  			hw_desc =3D &desc->hw_desc[loop++];
> -			status =3D dw_axi_dma_set_hw_desc(chan, hw_desc,
> mem, segment_len);
> +			status =3D dw_axi_dma_set_hw_desc(chan, hw_desc,
> desc,
> +							mem, segment_len);
>  			if (status < 0)
>  				goto err_desc_get;
>=20
> @@ -1023,8 +1040,13 @@ static int dw_axi_dma_chan_slave_config(struct
> dma_chan *dchan,
>  					struct dma_slave_config *config)
>  {
>  	struct axi_dma_chan *chan =3D dchan_to_axi_dma_chan(dchan);
> +	struct dw_axi_peripheral_config *periph =3D config->peripheral_config;
>=20
>  	memcpy(&chan->config, config, sizeof(*config));
> +	if (config->peripheral_size =3D=3D sizeof(*periph))
> +		chan->quirks =3D periph->quirks;
> +	else
> +		chan->quirks =3D 0;
>=20
>  	return 0;
>  }
> diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h b/drivers/dma/dw-axi-
> dmac/dw-axi-dmac.h
> index 454904d99654..043d7eb7cb67 100644
> --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
> +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
> @@ -14,6 +14,7 @@
>  #include <linux/clk.h>
>  #include <linux/device.h>
>  #include <linux/dmaengine.h>
> +#include <linux/dma/dw_axi.h>
>  #include <linux/types.h>
>=20
>  #include "../virt-dma.h"
> @@ -50,6 +51,7 @@ struct axi_dma_chan {
>  	struct dma_slave_config		config;
>  	enum dma_transfer_direction	direction;
>  	bool				cyclic;
> +	u32				quirks;
>  	/* these other elements are all protected by vc.lock */
>  	bool				is_paused;
>  };
> diff --git a/include/linux/dma/dw_axi.h b/include/linux/dma/dw_axi.h new
> file mode 100644 index 000000000000..fd49152869a4
> --- /dev/null
> +++ b/include/linux/dma/dw_axi.h
> @@ -0,0 +1,11 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +#ifndef __LINUX_DMA_DW_AXI_H
> +#define __LINUX_DMA_DW_AXI_H
> +
> +#include <linux/types.h>
> +
> +struct dw_axi_peripheral_config {
> +#define DWAXIDMAC_STARFIVE_SM_ALGO	BIT(0)
> +	u32 quirks;
> +};
> +#endif /* __LINUX_DMA_DW_AXI_H */
> --
> 2.34.1

Hi Eugeniy/Vinod,
Could you please help review this patch?

Thanks,
Jia Jie