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Message-ID: <8ec4286e-3477-4fcd-8176-5c3a6606f0a1@foss.st.com>
Date: Thu, 16 May 2024 13:47:13 +0200
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Subject: Re: [PATCH 2/2] hwrng: stm32 - cache device pointer in struct
 stm32_rng_private
To: Marek Vasut <marex@denx.de>, <linux-crypto@vger.kernel.org>
CC: =?UTF-8?Q?Uwe_Kleine-K=C3=B6nig?= <u.kleine-koenig@pengutronix.de>,
        Alexandre Torgue <alexandre.torgue@foss.st.com>,
        Herbert Xu
	<herbert@gondor.apana.org.au>,
        Maxime Coquelin <mcoquelin.stm32@gmail.com>,
        Olivia Mackall <olivia@selenic.com>, Rob Herring <robh@kernel.org>,
        Yang
 Yingliang <yangyingliang@huawei.com>,
        <kernel@dh-electronics.com>, <linux-arm-kernel@lists.infradead.org>,
        <linux-stm32@st-md-mailman.stormreply.com>
References: <20240516012210.128307-1-marex@denx.de>
 <20240516012210.128307-2-marex@denx.de>
 <1e2da893-efff-4f7c-9842-a9484e4c2230@foss.st.com>
 <404122b2-75fe-4da6-8167-fb98eba7f941@denx.de>
Content-Language: en-US
From: Gatien CHEVALLIER <gatien.chevallier@foss.st.com>
In-Reply-To: <404122b2-75fe-4da6-8167-fb98eba7f941@denx.de>
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On 5/16/24 12:52, Marek Vasut wrote:
> On 5/16/24 11:37 AM, Gatien CHEVALLIER wrote:
> 
> Hi,
> 
>>> diff --git a/drivers/char/hw_random/stm32-rng.c 
>>> b/drivers/char/hw_random/stm32-rng.c
>>> index 6dec4adc49853..00012e6e4ccc8 100644
>>> --- a/drivers/char/hw_random/stm32-rng.c
>>> +++ b/drivers/char/hw_random/stm32-rng.c
>>> @@ -70,6 +70,7 @@ struct stm32_rng_config {
>>>   struct stm32_rng_private {
>>>       struct hwrng rng;
>>> +    struct device *dev;
>>>       void __iomem *base;
>>>       struct clk *clk;
>>>       struct reset_control *rst;
>>> @@ -99,7 +100,7 @@ struct stm32_rng_private {
>>>    */
>>>   static int stm32_rng_conceal_seed_error_cond_reset(struct 
>>> stm32_rng_private *priv)
>>>   {
>>> -    struct device *dev = (struct device *)priv->rng.priv;
>>> +    struct device *dev = priv->dev;
>>>       u32 sr = readl_relaxed(priv->base + RNG_SR);
>>>       u32 cr = readl_relaxed(priv->base + RNG_CR);
>>>       int err;
>>> @@ -171,7 +172,7 @@ static int stm32_rng_conceal_seed_error(struct 
>>> hwrng *rng)
>>>   {
>>>       struct stm32_rng_private *priv = container_of(rng, struct 
>>> stm32_rng_private, rng);
>>> -    dev_dbg((struct device *)priv->rng.priv, "Concealing seed 
>>> error\n");
>>> +    dev_dbg(priv->dev, "Concealing seed error\n");
>>>       if (priv->data->has_cond_reset)
>>>           return stm32_rng_conceal_seed_error_cond_reset(priv);
>>> @@ -187,7 +188,7 @@ static int stm32_rng_read(struct hwrng *rng, void 
>>> *data, size_t max, bool wait)
>>>       int retval = 0, err = 0;
>>>       u32 sr;
>>> -    retval = pm_runtime_resume_and_get((struct device 
>>> *)priv->rng.priv);
>>> +    retval = pm_runtime_resume_and_get(priv->dev);
>>>       if (retval)
>>>           return retval;
>>> @@ -206,7 +207,7 @@ static int stm32_rng_read(struct hwrng *rng, void 
>>> *data, size_t max, bool wait)
>>>                                      sr, sr,
>>>                                      10, 50000);
>>>               if (err) {
>>> -                dev_err((struct device *)priv->rng.priv,
>>> +                dev_err(priv->dev,
>>>                       "%s: timeout %x!\n", __func__, sr);
>>
>> Nit: Fits in one line
> 
> The limit is now 100 instead of 80 chars, right ?
> 
> btw I found one more and fixed it.

Yes it is,

thanks