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Date: Thu, 23 May 2024 15:37:52 +0100
From: Conor Dooley <conor@kernel.org>
To: Alexey Romanov <avromanov@salutedevices.com>
Cc: "neil.armstrong@linaro.org" <neil.armstrong@linaro.org>,
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Subject: Re: [PATCH v7 17/23] dt-bindings: crypto: meson: remove clk and
 second interrupt line for GXL
Message-ID: <20240523-snowiness-attain-75d415573b5a@spud>
References: <20240411133832.2896463-1-avromanov@salutedevices.com>
 <20240411133832.2896463-18-avromanov@salutedevices.com>
 <20240415-schnapps-plating-eb0895459004@spud>
 <20240506134754.jl633ncne7ct6szo@cab-wsm-0029881>
 <20240506-distrust-famine-6848f75dd3fe@spud>
 <20240523104624.tr5omyxnzxsjkpai@cab-wsm-0029881.sigma.sbrf.ru>
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On Thu, May 23, 2024 at 10:46:35AM +0000, Alexey Romanov wrote:
> Hi Conor,
>=20
> On Mon, May 06, 2024 at 04:47:29PM +0100, Conor Dooley wrote:
> > On Mon, May 06, 2024 at 01:48:01PM +0000, Alexey Romanov wrote:
> > > On Mon, Apr 15, 2024 at 05:43:15PM +0100, Conor Dooley wrote:
> > > > On Thu, Apr 11, 2024 at 04:38:26PM +0300, Alexey Romanov wrote:
> > > > > GXL crypto IP isn't connected to clk and seconnd interrput line,
> > > > > so we must remove them from dt-bindings.
> > > >=20
> > > > How does the device work without a clock?
> > >=20
> > > It's clocked by a common clock, the vendor didn't provide more
> > > information. It doesn't have any special clock domains.
> >=20
> > So the hardware block does have a clock, which, even if it is a clock
> > shared with other hardware blocks, makes your patch incorrect.
> >=20
> > Is the "blkmv" clock the shared clock?
>=20
> I received accurate information from the vendor. Starting from GXL,
> DMA engine is used for crypto HW and clock is hard weired to it (at RTL
> level).

> That's why we have to remove it from device tree, because we can't
> control it anyway.

That's not true, if the clock runs at a fixed frequency it should be
described as a fixed-clock in the devicetree.

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