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nGPwP2FJt/tiPSksSkPjMnBUqm4tNuVo1ppAJvppSaXLXaPF9rao6otqDH46Gl8/rl50sEkbNUcF32WOs3GhjnuJ4V4rPhO6u3yW/FtM7fbElCXbv/5lG/dzrotZNKsUANs2AQesmC/qtshDXB++/6GdjgZCCoKN7pQ31Bnlae4TGZx4NbiQKofQ5VvayQ1ivy68ucWaRnwrX1GmdkTADtCur1Bbc6D1AFFAwqvBT84Ncy42qO/SFl1ucg/vKEFV0FjRM6Og61zdnmIQTBjPFzYkU/43rrpK5k8Yfa5iWpIgprryxL2PO/1Bu5j/mzPKtqNUo7RU+80X3FqVHzFPRqAzzcuPgnToOXNIBQXfeeqZzg74ycMVLouA80uRxUk32ouzwkl563Os9JGBRL+1ADYszopGpIzYHhc94YWpNurzjzrM98hg48gQvd4q0XQGB5ZQmXbjUEaTJNZZVSjKvU7YcSg0NKqeOnHRuO4Sq+++NKPCXVetIS4umJgtHbLCEZb5fLlgmqF3YalA7EYdRT9ANUtnX0w1JxkoW4XpOjUULFSn+mEwyX5SHv8KvP3/dGd7iZPTACk+xegufZ0ghNEPMSTH1EZHwP/bMNY0FII= X-OriginatorOrg: oracle.com X-MS-Exchange-CrossTenant-Network-Message-Id: a68af263-084d-47e3-ee57-08dc84d5616f X-MS-Exchange-CrossTenant-AuthSource: DS0PR10MB7224.namprd10.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Jun 2024 20:31:57.8774 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 4e2c6054-71cb-48f1-bd6c-3a9705aca71b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: c0FyRM2jnD1yUC8vx1BKUzEMzDA0egcZWCnpxIDamQgDTCfSuVIPpCHGmoZ5s/2wzaRO5Y53T5vRQo/tOHELMQB/kTICAPRV4mSrgfG3G8A= X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR10MB7259 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-04_11,2024-06-04_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 bulkscore=0 mlxscore=0 malwarescore=0 suspectscore=0 spamscore=0 mlxlogscore=999 adultscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2405010000 definitions=main-2406040165 X-Proofpoint-ORIG-GUID: E8aWxefCU9_B3S8Yn-Dcl0eugmiDA0cl X-Proofpoint-GUID: E8aWxefCU9_B3S8Yn-Dcl0eugmiDA0cl On 6/4/24 11:21 AM, Jarkko Sakkinen wrote: > On Fri May 31, 2024 at 4:03 AM EEST, Ross Philipson wrote: >> Introduce the Secure Launch Resource Table which forms the formal >> interface between the pre and post launch code. >> >> Signed-off-by: Ross Philipson > > If a uarch specific, I'd appreciate Intel SDM reference here so that I > can look it up and compare. Like in section granularity. This table is meant to not be architecture specific though it can contain architecture specific sub-entities. E.g. there is a TXT specific table and in the future there will be an AMD and ARM one (and hopefully some others). I hope that addresses what you are pointing out or maybe I don't fully understand what you mean here... Thanks Ross > > BR, Jarkko