2009-11-05 16:41:11

by Herbert Xu

[permalink] [raw]
Subject: Re: Hardware crypto accelerator for IPSec

On Thu, Nov 05, 2009 at 11:22:52AM +0330, Hamid Nassiby wrote:
> Hi,
>
> In a research project, I want to offload the encryption process of IPSec to
> one hardware-based crypto accelerator , which is implemented by a Xilinx
> virtex5 FPGA.
> The most noticeable question arises here is about the best location of
> catching the IPSec packets from their path.( Then getting them to the
> hardware accelerator for encryption process and finally returning them back
> to the path they were going .)
>
> I guess that the location of departure must be in esp4.c or aead.c and maybe
> authenc.c; But as I said I only GUESS, and I need help . Any recommendation
> would be pleased .

Please take a look at drivers/crypto/talitos.c. That shows
how you can hook into the system.

Cheers,
--
Visit Openswan at http://www.openswan.org/
Email: Herbert Xu ~{PmV>HI~} <[email protected]>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt