2010-09-10 17:37:02

by Hoban, Adrian

[permalink] [raw]
Subject: [PATCH 0/3] Optimized RFC4106 AES-GCM implementation using Intel New Instructions


This set of patches adds an optimized RFC4106 AES-GCM implementation for 64-bit kernels and 128-bit AES keys. It supports processors based on the Intel(r) microarchitecture codename Westmere, such as the Intel(r) Xeon(r) 5600 processor family.

The code leverages the crypto AEAD interface type to facilitate a combined AES & GCM operation to be implemented in a unified block of assembly code. The assembly code leverages Intel(r) AES New Instructions and the carry-less multiple PCLMULQDQ instruction which were introduced on the Intel(r) microarchitecture codename Westmere.

The first patch is an update to the cryptd framework to add support for the AEAD interface type.
The second patch is the RFC4106 AES-GCM Crypto Driver & Assembly Code.
The third patch is an update to crypto self-test code to extend AES-GCM tests.

For more information on the patches, the assembly code design, and on some performance results please reference these papers:
Using Intel(r) AES New Instructions and PCLMULQDQ to Significantly Improve IPSec Performance on Linux: http://download.intel.com/design/intarch/papers/324238.pdf
Optimized Galois-Counter-Mode Implementation on Intel(r) Architecture Processors: http://download.intel.com/design/intarch/PAPERS/324194.pdf

Adrian Hoban
Intel Shannon Limited
Registered in Ireland
Registered Office: Collinstown Industrial Park, Leixlip, County Kildare
Registered Number: 308263
Business address: Dromore House, East Park, Shannon, Co. Clare

This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies.