Received: by 2002:a05:6a10:af89:0:0:0:0 with SMTP id iu9csp1514168pxb; Sat, 29 Jan 2022 08:10:24 -0800 (PST) X-Google-Smtp-Source: ABdhPJzKmgf41p3Senq13m9jOmF1mlji0DFkNRevmplfYpUuBREfqp8skmbEuyTsGrBjqAhmgpcI X-Received: by 2002:a05:6402:1241:: with SMTP id l1mr13134336edw.64.1643472623907; Sat, 29 Jan 2022 08:10:23 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1643472623; cv=pass; d=google.com; s=arc-20160816; b=qjYJxjHzEDaPacJF2URieWgd1BbrmPRhRdogVi7NBzSexVwqRWvgSSuQ1UPnfM7DY4 0BR0u1/v8h88EuWZAWRpQ9cswE9N9OGsEPfb6w9fAuhc+7kdqG8SnX0Jf9Jz7aXCxWzi 17n/ZDJbtK+IxXR4WR0RgHTw0fylhngVHjrVl6qvlhXKdr8qWStYa0LHAb/ao82fd9Di VJ4sp9mm6Kj9wFyCvUwZOIgWbg6AphpUHqR51d9fmvyoGbcC6WrNLx/haURNflZ/c6ni 5wbgMxG2HFKmbqBL5F3Un3c+F+TfVvam0qamg4v7j/fkPHV0nRgFQV4Nf4NIbyIV6BAk 00JQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=0KZzzHjcSlVAzM/FpTh1shMiUkvWvuZpXH50SUU2kpw=; b=vAIDVbHf3kMQkXPNwOHm09gj8FEYoDgwMnHQ06OBxlqtrNUbTG1eVpu2ezRur4Sr/Q dW7pSsxkgp8clgem3XJPSDPRHvgnTyNOQt9it2Wzrqf/YUP/pyyItbgpg99lqtem8oGy mMf4DHLbqNOtmwfM71fYqd0OgLyJPmdXqijVea5wHBHPdwVHJtZq/v82Ksw91zpqfElU h6mSZ+2S4gSioM8Mf/vmeD0+iWKUaUh2yaO0fcAWUipo5qz1ROjZnO5r8ilGw/Y6YYl8 /KrV8hV6ZrZDmzdcwgEUNLb7yp22GruNaDf+mAhwR14c+JNxKWDjorku9seRaPiXwqtl ltYQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@Nvidia.com header.s=selector2 header.b=sCz6fA9d; arc=pass (i=1 spf=pass spfdomain=nvidia.com dmarc=pass fromdomain=nvidia.com); spf=pass (google.com: domain of linux-ext4-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-ext4-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=nvidia.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id 8si4432413ejd.410.2022.01.29.08.09.58; Sat, 29 Jan 2022 08:10:23 -0800 (PST) Received-SPF: pass (google.com: domain of linux-ext4-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@Nvidia.com header.s=selector2 header.b=sCz6fA9d; arc=pass (i=1 spf=pass spfdomain=nvidia.com dmarc=pass fromdomain=nvidia.com); spf=pass (google.com: domain of linux-ext4-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-ext4-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242129AbiA1EXA (ORCPT + 99 others); Thu, 27 Jan 2022 23:23:00 -0500 Received: from mail-mw2nam12on2062.outbound.protection.outlook.com ([40.107.244.62]:18369 "EHLO NAM12-MW2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S242100AbiA1EW6 (ORCPT ); Thu, 27 Jan 2022 23:22:58 -0500 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=RuLWyBFqwBrOqf1rd0awb4u2+puZCtR6vXi7Ez8LXn7aVREkup0Gv7rZHdIcYkopY5ziwEwLGRNYaoSVZFMkLBKCDJA0TI21kFZJXSa59r4ehHNmGosb5iL6z3agA6OLNq1tGATlSpAuk4cIydl3LR1JnKXvKpr3HJpJxzskRLTQs0JP5dF9QC3GPlkNfYC1pu0B+l2Lf8V1n+ecqeA3+9UbFdiWuoba7MeyiUPg/0K20lejtTAAJwc+7FBVcMDPpnn9WTaJxCf+Ojka0Upv6NNaYsHeT2VCYYHREBxPPbpzPJZ4isUSDsyJmOJNJHHPD7kiyf/0CiTaxJrHS17L9Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=0KZzzHjcSlVAzM/FpTh1shMiUkvWvuZpXH50SUU2kpw=; b=EJYNVk8IfO40HRTJQOBje6tCdU1p2nYB1NWJiV0gSuSPy9/ZHPtzefZFa72scpHPVYY+IFZJirEOeJYI6vZcqgcp3TFeIVinfA6roWzaq4XEI184F4frcDdqedF5LzZWQ8/WsuNa5nIbgJtrMH5AmQg5lgK07yM2OIc9Jsuq02R0SSHd7+OOFAowZtdEA/iezF9UR19zQhkHfp6KBKSYv5FZYhH0ulfreO1B6AlZ9T5EhAiMrbOlrjU3gK6onQzMvUCpXtCgxZZG1jOgafoX2ID/0Gm93bwKhQ2xiiEKfscIDUOquQbeqxtF2yqw7YpfJSckxVyFGahsJ2tdLAOsQQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 12.22.5.236) smtp.rcpttodomain=lists.freedesktop.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=0KZzzHjcSlVAzM/FpTh1shMiUkvWvuZpXH50SUU2kpw=; b=sCz6fA9dL/ujPIF7FSdaUVFslnDk/AUinXn+3eCpRiuMgHwY7fQd2wWIWgXFjlXvqEoAZd0GYIbTiUt9oGc5CSuVvTzfyat9ZK3wM6L+CpuMP08FWKMliD6u+UjuQyuoawh2CcTywCIF7CTekxzF8q3i/SwZifMOVXPiEG8yE3og1zVy6/3HLd1HM7XDnLbcOdpstTy7OlNbOfVrpaMAFv08Vcq+We6wojnPwuRlQbE6eK7BpdqySKHOpNQmW8Bd3BnQS89slslQJ1/q+vMSQqre6QOVtRyrot0JOYm2SJ894zPSAmtyXqnWikrZeonMhR0kpzUTyO0OMef60148sw== Received: from MW4PR04CA0328.namprd04.prod.outlook.com (2603:10b6:303:82::33) by MN2PR12MB3247.namprd12.prod.outlook.com (2603:10b6:208:ad::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4909.12; Fri, 28 Jan 2022 04:22:53 +0000 Received: from CO1NAM11FT020.eop-nam11.prod.protection.outlook.com (2603:10b6:303:82:cafe::38) by MW4PR04CA0328.outlook.office365.com (2603:10b6:303:82::33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4930.15 via Frontend Transport; Fri, 28 Jan 2022 04:22:52 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 12.22.5.236) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 12.22.5.236 as permitted sender) receiver=protection.outlook.com; client-ip=12.22.5.236; helo=mail.nvidia.com; Received: from mail.nvidia.com (12.22.5.236) by CO1NAM11FT020.mail.protection.outlook.com (10.13.174.149) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4930.15 via Frontend Transport; Fri, 28 Jan 2022 04:22:52 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by DRHQMAIL109.nvidia.com (10.27.9.19) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Fri, 28 Jan 2022 04:22:51 +0000 Received: from nvdebian.localnet (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.9; Thu, 27 Jan 2022 20:22:48 -0800 From: Alistair Popple To: , , , , , , Alex Sierra CC: , , , , , Subject: Re: [PATCH v4 07/10] lib: test_hmm add module param for zone device type Date: Fri, 28 Jan 2022 15:22:46 +1100 Message-ID: <1953720.XltcCvqqDp@nvdebian> In-Reply-To: <20220127030949.19396-8-alex.sierra@amd.com> References: <20220127030949.19396-1-alex.sierra@amd.com> <20220127030949.19396-8-alex.sierra@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: drhqmail201.nvidia.com (10.126.190.180) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 289a033c-2dad-4f9f-0712-08d9e215d9b5 X-MS-TrafficTypeDiagnostic: MN2PR12MB3247:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:4941; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: IkaLWfd66SYA0BCiyU4wf23PASo33jVAFBzZW+KuwnVFm8tpioNRXCApP+CQZBrwrO6B1F3tP80fwHTUl+RoIUsOaBeM4FX0EOxiaR3zgtXzAtPW5E0eiFCv5qUsdbS9GhKkdaA21grLyOoEUCtNHREmsgVqKy2tyN33Rc1VyRY7dNIyY9eVdGU5Z9WrQgQ+MlC6ssDij8Fpk+WbOsqbvfTZvxpVoAr2J7EYqd95J9BQZaaeomLnh9veXtZoWP4dI3xR+MZv0fTbPCimCqcIjCmzD+EJ5Sxok/DlGFIquPg1VcmmiAELeKGKO+SOwDttccR8n7JYx7Xtf2zB5QO6XWB7k3ZDRg5EPrNI8F9vH8b0KIlft3jpFAesCxE4ePQcoCTvAKU7HxJiZPNuSGAb66sK+1MEMTjb/GnFf0k/5+qUlj+nYfMrfNB+L3Q+c87ypKoC8QK9KwWIJ+nUIZehdSdBckQ3nA3tfj5KH8N8S5BJIkrnxsiXMybLcyDeBQRnCZY/hRxPAdSSZ8hzoBIp1uXdjOmOXM344u7Fs3RDehk6FbXSUDs7dGkxfa2yqSIS9oI6uVXo535jtZFFk44toJCz3qZYJoiaQ8OvdkNw05MHfQaYH4xaphQUiMU6tnIdfbGoWXh3AJkuDCT9nIRULExE8qlr4Rbefatv+TF6tpzS2gs1rv9iCsniy2kxax9xvgYntgFHHTwpHWGglPgW96dkurJ3Mz6hO03FTqcVmeD/DYfT0jcukPcBw0WQ02x+6o5fUJi19dUA5I+LJAk5n0RXlnQbpbiMlodOSXHm9p4= X-Forefront-Antispam-Report: CIP:12.22.5.236;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:mail.nvidia.com;PTR:InfoNoRecords;CAT:NONE;SFS:(4636009)(40470700004)(46966006)(36840700001)(81166007)(82310400004)(40460700003)(356005)(47076005)(70586007)(186003)(9686003)(426003)(54906003)(9576002)(110136005)(33716001)(36860700001)(86362001)(2906002)(508600001)(26005)(8676002)(83380400001)(5660300002)(7416002)(336012)(16526019)(316002)(4326008)(8936002)(70206006)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Jan 2022 04:22:52.3096 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 289a033c-2dad-4f9f-0712-08d9e215d9b5 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.236];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT020.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB3247 Precedence: bulk List-ID: X-Mailing-List: linux-ext4@vger.kernel.org Thanks for the updates, looks good now. Reviewed-by: Alistair Popple On Thursday, 27 January 2022 2:09:46 PM AEDT Alex Sierra wrote: > In order to configure device coherent in test_hmm, two module parameters > should be passed, which correspond to the SP start address of each > device (2) spm_addr_dev0 & spm_addr_dev1. If no parameters are passed, > private device type is configured. > > Signed-off-by: Alex Sierra > --- > lib/test_hmm.c | 73 ++++++++++++++++++++++++++++++++------------- > lib/test_hmm_uapi.h | 1 + > 2 files changed, 53 insertions(+), 21 deletions(-) > > diff --git a/lib/test_hmm.c b/lib/test_hmm.c > index fb1fa7c6fa98..6f068f7c4ee3 100644 > --- a/lib/test_hmm.c > +++ b/lib/test_hmm.c > @@ -34,6 +34,16 @@ > #define DEVMEM_CHUNK_SIZE (256 * 1024 * 1024U) > #define DEVMEM_CHUNKS_RESERVE 16 > > +static unsigned long spm_addr_dev0; > +module_param(spm_addr_dev0, long, 0644); > +MODULE_PARM_DESC(spm_addr_dev0, > + "Specify start address for SPM (special purpose memory) used for device 0. By setting this Coherent device type will be used. Make sure spm_addr_dev1 is set too. Minimum SPM size should be DEVMEM_CHUNK_SIZE."); > + > +static unsigned long spm_addr_dev1; > +module_param(spm_addr_dev1, long, 0644); > +MODULE_PARM_DESC(spm_addr_dev1, > + "Specify start address for SPM (special purpose memory) used for device 1. By setting this Coherent device type will be used. Make sure spm_addr_dev0 is set too. Minimum SPM size should be DEVMEM_CHUNK_SIZE."); > + > static const struct dev_pagemap_ops dmirror_devmem_ops; > static const struct mmu_interval_notifier_ops dmirror_min_ops; > static dev_t dmirror_dev; > @@ -452,28 +462,44 @@ static int dmirror_write(struct dmirror *dmirror, struct hmm_dmirror_cmd *cmd) > return ret; > } > > -static bool dmirror_allocate_chunk(struct dmirror_device *mdevice, > +static int dmirror_allocate_chunk(struct dmirror_device *mdevice, > struct page **ppage) > { > struct dmirror_chunk *devmem; > - struct resource *res; > + struct resource *res = NULL; > unsigned long pfn; > unsigned long pfn_first; > unsigned long pfn_last; > void *ptr; > + int ret = -ENOMEM; > > devmem = kzalloc(sizeof(*devmem), GFP_KERNEL); > if (!devmem) > - return false; > + return ret; > > - res = request_free_mem_region(&iomem_resource, DEVMEM_CHUNK_SIZE, > - "hmm_dmirror"); > - if (IS_ERR(res)) > + switch (mdevice->zone_device_type) { > + case HMM_DMIRROR_MEMORY_DEVICE_PRIVATE: > + res = request_free_mem_region(&iomem_resource, DEVMEM_CHUNK_SIZE, > + "hmm_dmirror"); > + if (IS_ERR_OR_NULL(res)) > + goto err_devmem; > + devmem->pagemap.range.start = res->start; > + devmem->pagemap.range.end = res->end; > + devmem->pagemap.type = MEMORY_DEVICE_PRIVATE; > + break; > + case HMM_DMIRROR_MEMORY_DEVICE_COHERENT: > + devmem->pagemap.range.start = (MINOR(mdevice->cdevice.dev) - 2) ? > + spm_addr_dev0 : > + spm_addr_dev1; > + devmem->pagemap.range.end = devmem->pagemap.range.start + > + DEVMEM_CHUNK_SIZE - 1; > + devmem->pagemap.type = MEMORY_DEVICE_COHERENT; > + break; > + default: > + ret = -EINVAL; > goto err_devmem; > + } > > - devmem->pagemap.type = MEMORY_DEVICE_PRIVATE; > - devmem->pagemap.range.start = res->start; > - devmem->pagemap.range.end = res->end; > devmem->pagemap.nr_range = 1; > devmem->pagemap.ops = &dmirror_devmem_ops; > devmem->pagemap.owner = mdevice; > @@ -494,10 +520,14 @@ static bool dmirror_allocate_chunk(struct dmirror_device *mdevice, > mdevice->devmem_capacity = new_capacity; > mdevice->devmem_chunks = new_chunks; > } > - > ptr = memremap_pages(&devmem->pagemap, numa_node_id()); > - if (IS_ERR(ptr)) > + if (IS_ERR_OR_NULL(ptr)) { > + if (ptr) > + ret = PTR_ERR(ptr); > + else > + ret = -EFAULT; > goto err_release; > + } > > devmem->mdevice = mdevice; > pfn_first = devmem->pagemap.range.start >> PAGE_SHIFT; > @@ -526,15 +556,17 @@ static bool dmirror_allocate_chunk(struct dmirror_device *mdevice, > } > spin_unlock(&mdevice->lock); > > - return true; > + return 0; > > err_release: > mutex_unlock(&mdevice->devmem_lock); > - release_mem_region(devmem->pagemap.range.start, range_len(&devmem->pagemap.range)); > + if (res && devmem->pagemap.type == MEMORY_DEVICE_PRIVATE) > + release_mem_region(devmem->pagemap.range.start, > + range_len(&devmem->pagemap.range)); > err_devmem: > kfree(devmem); > > - return false; > + return ret; > } > > static struct page *dmirror_devmem_alloc_page(struct dmirror_device *mdevice) > @@ -559,7 +591,7 @@ static struct page *dmirror_devmem_alloc_page(struct dmirror_device *mdevice) > spin_unlock(&mdevice->lock); > } else { > spin_unlock(&mdevice->lock); > - if (!dmirror_allocate_chunk(mdevice, &dpage)) > + if (dmirror_allocate_chunk(mdevice, &dpage)) > goto error; > } > > @@ -1219,10 +1251,8 @@ static int dmirror_device_init(struct dmirror_device *mdevice, int id) > if (ret) > return ret; > > - /* Build a list of free ZONE_DEVICE private struct pages */ > - dmirror_allocate_chunk(mdevice, NULL); > - > - return 0; > + /* Build a list of free ZONE_DEVICE struct pages */ > + return dmirror_allocate_chunk(mdevice, NULL); > } > > static void dmirror_device_remove(struct dmirror_device *mdevice) > @@ -1235,8 +1265,9 @@ static void dmirror_device_remove(struct dmirror_device *mdevice) > mdevice->devmem_chunks[i]; > > memunmap_pages(&devmem->pagemap); > - release_mem_region(devmem->pagemap.range.start, > - range_len(&devmem->pagemap.range)); > + if (devmem->pagemap.type == MEMORY_DEVICE_PRIVATE) > + release_mem_region(devmem->pagemap.range.start, > + range_len(&devmem->pagemap.range)); > kfree(devmem); > } > kfree(mdevice->devmem_chunks); > diff --git a/lib/test_hmm_uapi.h b/lib/test_hmm_uapi.h > index 17f842f1aa02..625f3690d086 100644 > --- a/lib/test_hmm_uapi.h > +++ b/lib/test_hmm_uapi.h > @@ -68,6 +68,7 @@ enum { > enum { > /* 0 is reserved to catch uninitialized type fields */ > HMM_DMIRROR_MEMORY_DEVICE_PRIVATE = 1, > + HMM_DMIRROR_MEMORY_DEVICE_COHERENT, > }; > > #endif /* _LIB_TEST_HMM_UAPI_H */ >