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Wed, 30 Mar 2022 16:24:30 -0500 From: Alex Sierra To: CC: , , , , , , , , , , , , Subject: [PATCH] drm/amdkfd: Add SVM API support capability bits Date: Wed, 30 Mar 2022 16:24:20 -0500 Message-ID: <20220330212420.12003-1-alex.sierra@amd.com> X-Mailer: git-send-email 2.32.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: d8cfbc1c-0d29-4964-fc14-08da1293ae5b X-MS-TrafficTypeDiagnostic: DM5PR12MB1292:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: aupQPbJRX2JzI8WvZf0zE+nSjLTyRAlKukftwyodn5s4jQEj71Y9zV+8v3Mx4m5d9f2X+SffVwGNyCb0Vutznub6qgvS4lE4f/f/8TizBGFLFftaL83fZdhXDc3Ux1RjcgOWCyLo7QXCrriZWbcOql3VQTmjQ6dsx6l9vYFNT1ZlbYp04eE+ggw2IEB9LrhqQKI44pXJ0e4xXPoFX9hBFwVJS/GKaXJLTlBNgAK7NXNjzVH31Y8FXtCQJRZrfrwSGMnl0TqvjSm6DKr1++wH9R9tVg82eUtlFH9Bi4RPWZYsjQouEywSp/jmE9paVAZLdqKK4BSsNvammDRLmyNZjYrBBAEiPWFLU/V++V9szMXbTfTGbenN4rBTWtKAwRzyXxhsGBhS8AsyEAoBF0m3tahpvXSPiM6ZMD/VwQnW8Y9ATjYsjTnI3qfJ6DHRWUjGprzWBRKPpz1MSeuusx24HsEWGUQfASRrE+aCNvhrHSBLVrq6b5H1BJ8zjETxXHthc7ysKu7v6jg921SIVnYmmIHuW8SD+ErrAKvSWc5a67RcCYW7/UCsih/jKxKwHkP9KVeBQjNO1ZN+W8zq9GJT5u6U2weVFcb6OvcF4EwqAyD1IyTBwWYkSViUQXyFE8+dv9PW6YCVe5csjps8VDuWH3rzyQVhr/nph2WvElbMMG2/DcK0uHibDxl+mAMRgeuEFpOt27otBNAvstQ9Y8GhXw== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230001)(4636009)(46966006)(36840700001)(40470700004)(4326008)(6666004)(426003)(336012)(70206006)(82310400004)(7416002)(2906002)(7696005)(70586007)(54906003)(86362001)(40460700003)(508600001)(316002)(5660300002)(8676002)(44832011)(8936002)(6916009)(356005)(36756003)(2616005)(83380400001)(36860700001)(26005)(16526019)(1076003)(47076005)(186003)(81166007)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Mar 2022 21:24:31.9384 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d8cfbc1c-0d29-4964-fc14-08da1293ae5b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT013.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB1292 X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-ext4@vger.kernel.org From: Philip Yang SVMAPISupported property added to HSA_CAPABILITY, the value match HSA_CAPABILITY defined in Thunk spec: SVMAPISupported: it will not be supported on older kernels that don't have HMM or on systems with GFXv8 or older GPUs without support for 48-bit virtual addresses. CoherentHostAccess property added to HSA_MEMORYPROPERTY, the value match HSA_MEMORYPROPERTY defined in Thunk spec: CoherentHostAccess: whether or not device memory can be coherently accessed by the host CPU. Signed-off-by: Philip Yang Reviewed-by: Felix Kuehling Signed-off-by: Felix Kuehling Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 6 ++++++ drivers/gpu/drm/amd/amdkfd/kfd_topology.h | 10 ++++++---- 2 files changed, 12 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c index cdef608db4f4..083ac9babfa8 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c @@ -1419,6 +1419,12 @@ int kfd_topology_add_device(struct kfd_dev *gpu) dev->node_props.capability |= (adev->ras_features != 0) ? HSA_CAP_RASEVENTNOTIFY : 0; + /* SVM API and HMM page migration work together, device memory type + * is initialized to not 0 when page migration register device memory. + */ + if (adev->kfd.dev->pgmap.type != 0) + dev->node_props.capability |= HSA_CAP_SVMAPI_SUPPORTED; + kfd_debug_print_topology(); if (!res) diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.h b/drivers/gpu/drm/amd/amdkfd/kfd_topology.h index b8b68087bd7a..6bd6380b0ee0 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.h +++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.h @@ -53,8 +53,9 @@ #define HSA_CAP_ASIC_REVISION_MASK 0x03c00000 #define HSA_CAP_ASIC_REVISION_SHIFT 22 #define HSA_CAP_SRAM_EDCSUPPORTED 0x04000000 +#define HSA_CAP_SVMAPI_SUPPORTED 0x08000000 -#define HSA_CAP_RESERVED 0xf80f8000 +#define HSA_CAP_RESERVED 0xf00f8000 struct kfd_node_properties { uint64_t hive_id; @@ -98,9 +99,10 @@ struct kfd_node_properties { #define HSA_MEM_HEAP_TYPE_GPU_LDS 4 #define HSA_MEM_HEAP_TYPE_GPU_SCRATCH 5 -#define HSA_MEM_FLAGS_HOT_PLUGGABLE 0x00000001 -#define HSA_MEM_FLAGS_NON_VOLATILE 0x00000002 -#define HSA_MEM_FLAGS_RESERVED 0xfffffffc +#define HSA_MEM_FLAGS_HOT_PLUGGABLE 0x00000001 +#define HSA_MEM_FLAGS_NON_VOLATILE 0x00000002 +#define HSA_MEM_FLAGS_COHERENTHOSTACCESS 0x00000004 +#define HSA_MEM_FLAGS_RESERVED 0xfffffff8 struct kfd_mem_properties { struct list_head list; -- 2.32.0