2021-04-15 14:19:21

by Johannes Behrens

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Subject: Adding a fifth edca tx queue

Hi,
currently I am planning to implement a fifth edca tx-queue in the kernel
for research purposes for special requirements on the tactile internet.

Now I am facing the challenge that I cannot find any actual hardware on
which I can implement another queue. Do you have any tips for me there?

I have already dug through the code of some drivers of Linux, but
usually it fails because of the firmware of the WIFI chipsets, which
does not support this.

Many thanks and greetings
Johannes



2021-04-15 15:42:19

by Johannes Berg

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Subject: Re: Adding a fifth edca tx queue

On Thu, 2021-04-15 at 18:07 +0200, Johannes Behrens wrote:
> Hi,
> currently I am planning to implement a fifth edca tx-queue in the kernel
> for research purposes for special requirements on the tactile internet.
>
> Now I am facing the challenge that I cannot find any actual hardware on
> which I can implement another queue. Do you have any tips for me there?

I doubt you'll have much luck with this, but do you really need all 5?
You could do a lot of experimentation by just changing the EDCA
parameters of e.g. the mostly unused VO or BK queues.

johannes

2021-04-16 10:57:07

by Sergey Ryazanov

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Subject: Re: Adding a fifth edca tx queue

Hello Johannes,

On Thu, Apr 15, 2021 at 5:19 PM Johannes Behrens
<[email protected]> wrote:
> currently I am planning to implement a fifth edca tx-queue in the kernel
> for research purposes for special requirements on the tactile internet.
>
> Now I am facing the challenge that I cannot find any actual hardware on
> which I can implement another queue. Do you have any tips for me there?
>
> I have already dug through the code of some drivers of Linux, but
> usually it fails because of the firmware of the WIFI chipsets, which
> does not support this.

Did you look at the ath9k driver for Atheros AR9xxx chipsets? These
chips support only .11a/b/g/n, but they are still a great choice for
MAC research due to the possibility to reprogram many aspects of
channel access.

--
Sergey

2021-04-17 07:40:39

by Johannes Behrens

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Subject: Re: Adding a fifth edca tx queue

On 15.04.21 17:40, Johannes Berg wrote:
> On Thu, 2021-04-15 at 18:07 +0200, Johannes Behrens wrote:
>> Hi,
>> currently I am planning to implement a fifth edca tx-queue in the kernel
>> for research purposes for special requirements on the tactile internet.
>>
>> Now I am facing the challenge that I cannot find any actual hardware on
>> which I can implement another queue. Do you have any tips for me there?
> I doubt you'll have much luck with this, but do you really need all 5?
> You could do a lot of experimentation by just changing the EDCA
> parameters of e.g. the mostly unused VO or BK queues.
>
> johannes
>
Thanks for the answer. I do not necessarily need all 5 queues. It would
just be extra nice and reflect my original thoughts. Changing the
parameters of an existing queue is my plan b and is basically sufficient
for the purpose of the research.

Regards Johannes

2021-04-17 07:52:52

by Johannes Behrens

[permalink] [raw]
Subject: Re: Adding a fifth edca tx queue

On 16.04.21 12:34, Sergey Ryazanov wrote:
> Hello Johannes,
>
> On Thu, Apr 15, 2021 at 5:19 PM Johannes Behrens
> <[email protected]> wrote:
>> currently I am planning to implement a fifth edca tx-queue in the kernel
>> for research purposes for special requirements on the tactile internet.
>>
>> Now I am facing the challenge that I cannot find any actual hardware on
>> which I can implement another queue. Do you have any tips for me there?
>>
>> I have already dug through the code of some drivers of Linux, but
>> usually it fails because of the firmware of the WIFI chipsets, which
>> does not support this.
> Did you look at the ath9k driver for Atheros AR9xxx chipsets? These
> chips support only .11a/b/g/n, but they are still a great choice for
> MAC research due to the possibility to reprogram many aspects of
> channel access.
>
Thank you for pointing this out. I have already looked at the ath9k and
ath5k drivers. Theoretically, it should be possible to freely configure
and use up to 10 (ath9k) tx queues there. However, my hope is to find
more modern chipsets (.11ac).

Regards Johannes