From: Sean Wang <[email protected]>
Since the related rx bitrate fields have been moved to group3 in Rxv,
fix rx bitrate statistics in mt7921_mac_fill_rx routine.
Fixes: 163f4d22c118d ("mt76: mt7921: add MAC support")
Signed-off-by: Sean Wang <[email protected]>
Signed-off-by: Lorenzo Bianconi <[email protected]>
---
.../net/wireless/mediatek/mt76/mt7921/mac.c | 152 +++++++++---------
.../net/wireless/mediatek/mt76/mt7921/mac.h | 10 +-
2 files changed, 85 insertions(+), 77 deletions(-)
diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/mac.c b/drivers/net/wireless/mediatek/mt76/mt7921/mac.c
index 3f9097481a5e..dca4878b9849 100644
--- a/drivers/net/wireless/mediatek/mt76/mt7921/mac.c
+++ b/drivers/net/wireless/mediatek/mt76/mt7921/mac.c
@@ -401,6 +401,8 @@ int mt7921_mac_fill_rx(struct mt7921_dev *dev, struct sk_buff *skb)
/* RXD Group 3 - P-RXV */
if (rxd1 & MT_RXD1_NORMAL_GROUP_3) {
u32 v0, v1, v2;
+ u8 stbc, gi;
+ bool cck;
rxv = rxd;
rxd += 2;
@@ -429,87 +431,87 @@ int mt7921_mac_fill_rx(struct mt7921_dev *dev, struct sk_buff *skb)
status->chain_signal[i]);
}
- /* RXD Group 5 - C-RXV */
- if (rxd1 & MT_RXD1_NORMAL_GROUP_5) {
- u8 stbc = FIELD_GET(MT_CRXV_HT_STBC, v2);
- u8 gi = FIELD_GET(MT_CRXV_HT_SHORT_GI, v2);
- bool cck = false;
+ stbc = FIELD_GET(MT_PRXV_STBC, v0);
+ gi = FIELD_GET(MT_PRXV_SGI, v0);
+ cck = false;
- rxd += 18;
- if ((u8 *)rxd - skb->data >= skb->len)
- return -EINVAL;
+ idx = i = FIELD_GET(MT_PRXV_TX_RATE, v0);
+ mode = FIELD_GET(MT_PRXV_TX_MODE, v0);
- idx = i = FIELD_GET(MT_PRXV_TX_RATE, v0);
- mode = FIELD_GET(MT_CRXV_TX_MODE, v2);
-
- switch (mode) {
- case MT_PHY_TYPE_CCK:
- cck = true;
- fallthrough;
- case MT_PHY_TYPE_OFDM:
- i = mt76_get_rate(&dev->mt76, sband, i, cck);
- break;
- case MT_PHY_TYPE_HT_GF:
- case MT_PHY_TYPE_HT:
- status->encoding = RX_ENC_HT;
- if (i > 31)
- return -EINVAL;
- break;
- case MT_PHY_TYPE_VHT:
- status->nss =
- FIELD_GET(MT_PRXV_NSTS, v0) + 1;
- status->encoding = RX_ENC_VHT;
- if (i > 9)
- return -EINVAL;
- break;
- case MT_PHY_TYPE_HE_MU:
- status->flag |= RX_FLAG_RADIOTAP_HE_MU;
- fallthrough;
- case MT_PHY_TYPE_HE_SU:
- case MT_PHY_TYPE_HE_EXT_SU:
- case MT_PHY_TYPE_HE_TB:
- status->nss =
- FIELD_GET(MT_PRXV_NSTS, v0) + 1;
- status->encoding = RX_ENC_HE;
- status->flag |= RX_FLAG_RADIOTAP_HE;
- i &= GENMASK(3, 0);
-
- if (gi <= NL80211_RATE_INFO_HE_GI_3_2)
- status->he_gi = gi;
-
- status->he_dcm = !!(idx & MT_PRXV_TX_DCM);
- break;
- default:
+ switch (mode) {
+ case MT_PHY_TYPE_CCK:
+ cck = true;
+ fallthrough;
+ case MT_PHY_TYPE_OFDM:
+ i = mt76_get_rate(&dev->mt76, sband, i, cck);
+ break;
+ case MT_PHY_TYPE_HT_GF:
+ case MT_PHY_TYPE_HT:
+ status->encoding = RX_ENC_HT;
+ if (i > 31)
return -EINVAL;
- }
- status->rate_idx = i;
-
- switch (FIELD_GET(MT_CRXV_FRAME_MODE, v2)) {
- case IEEE80211_STA_RX_BW_20:
- break;
- case IEEE80211_STA_RX_BW_40:
- if (mode & MT_PHY_TYPE_HE_EXT_SU &&
- (idx & MT_PRXV_TX_ER_SU_106T)) {
- status->bw = RATE_INFO_BW_HE_RU;
- status->he_ru =
- NL80211_RATE_INFO_HE_RU_ALLOC_106;
- } else {
- status->bw = RATE_INFO_BW_40;
- }
- break;
- case IEEE80211_STA_RX_BW_80:
- status->bw = RATE_INFO_BW_80;
- break;
- case IEEE80211_STA_RX_BW_160:
- status->bw = RATE_INFO_BW_160;
- break;
- default:
+ break;
+ case MT_PHY_TYPE_VHT:
+ status->nss =
+ FIELD_GET(MT_PRXV_NSTS, v0) + 1;
+ status->encoding = RX_ENC_VHT;
+ if (i > 9)
return -EINVAL;
+ break;
+ case MT_PHY_TYPE_HE_MU:
+ status->flag |= RX_FLAG_RADIOTAP_HE_MU;
+ fallthrough;
+ case MT_PHY_TYPE_HE_SU:
+ case MT_PHY_TYPE_HE_EXT_SU:
+ case MT_PHY_TYPE_HE_TB:
+ status->nss =
+ FIELD_GET(MT_PRXV_NSTS, v0) + 1;
+ status->encoding = RX_ENC_HE;
+ status->flag |= RX_FLAG_RADIOTAP_HE;
+ i &= GENMASK(3, 0);
+
+ if (gi <= NL80211_RATE_INFO_HE_GI_3_2)
+ status->he_gi = gi;
+
+ status->he_dcm = !!(idx & MT_PRXV_TX_DCM);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ status->rate_idx = i;
+
+ switch (FIELD_GET(MT_PRXV_FRAME_MODE, v0)) {
+ case IEEE80211_STA_RX_BW_20:
+ break;
+ case IEEE80211_STA_RX_BW_40:
+ if (mode & MT_PHY_TYPE_HE_EXT_SU &&
+ (idx & MT_PRXV_TX_ER_SU_106T)) {
+ status->bw = RATE_INFO_BW_HE_RU;
+ status->he_ru =
+ NL80211_RATE_INFO_HE_RU_ALLOC_106;
+ } else {
+ status->bw = RATE_INFO_BW_40;
}
+ break;
+ case IEEE80211_STA_RX_BW_80:
+ status->bw = RATE_INFO_BW_80;
+ break;
+ case IEEE80211_STA_RX_BW_160:
+ status->bw = RATE_INFO_BW_160;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ status->enc_flags |= RX_ENC_FLAG_STBC_MASK * stbc;
+ if (mode < MT_PHY_TYPE_HE_SU && gi)
+ status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
- status->enc_flags |= RX_ENC_FLAG_STBC_MASK * stbc;
- if (mode < MT_PHY_TYPE_HE_SU && gi)
- status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
+ if (rxd1 & MT_RXD1_NORMAL_GROUP_5) {
+ rxd += 18;
+ if ((u8 *)rxd - skb->data >= skb->len)
+ return -EINVAL;
}
}
diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/mac.h b/drivers/net/wireless/mediatek/mt76/mt7921/mac.h
index a0c1fa0f20e4..109c8849d106 100644
--- a/drivers/net/wireless/mediatek/mt76/mt7921/mac.h
+++ b/drivers/net/wireless/mediatek/mt76/mt7921/mac.h
@@ -97,18 +97,24 @@ enum rx_pkt_type {
#define MT_RXD3_NORMAL_PF_MODE BIT(29)
#define MT_RXD3_NORMAL_PF_STS GENMASK(31, 30)
-/* P-RXV */
+/* P-RXV DW0 */
#define MT_PRXV_TX_RATE GENMASK(6, 0)
#define MT_PRXV_TX_DCM BIT(4)
#define MT_PRXV_TX_ER_SU_106T BIT(5)
#define MT_PRXV_NSTS GENMASK(9, 7)
#define MT_PRXV_HT_AD_CODE BIT(11)
+#define MT_PRXV_FRAME_MODE GENMASK(14, 12)
+#define MT_PRXV_SGI GENMASK(16, 15)
+#define MT_PRXV_STBC GENMASK(23, 22)
+#define MT_PRXV_TX_MODE GENMASK(27, 24)
#define MT_PRXV_HE_RU_ALLOC_L GENMASK(31, 28)
-#define MT_PRXV_HE_RU_ALLOC_H GENMASK(3, 0)
+
+/* P-RXV DW1 */
#define MT_PRXV_RCPI3 GENMASK(31, 24)
#define MT_PRXV_RCPI2 GENMASK(23, 16)
#define MT_PRXV_RCPI1 GENMASK(15, 8)
#define MT_PRXV_RCPI0 GENMASK(7, 0)
+#define MT_PRXV_HE_RU_ALLOC_H GENMASK(3, 0)
/* C-RXV */
#define MT_CRXV_HT_STBC GENMASK(1, 0)
--
2.29.2
Hi Lorenzo,
I love your patch! Perhaps something to improve:
[auto build test WARNING on nbd168-wireless/mt76]
[cannot apply to wireless-drivers-next/master wireless-drivers/master v5.11-rc6 next-20210125]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Lorenzo-Bianconi/mt76-mt7921-multiple-fixes/20210209-190328
base: https://github.com/nbd168/wireless mt76
config: xtensa-allyesconfig (attached as .config)
compiler: xtensa-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/716af9b953825b6ade758b0ed48ee2ceceaee289
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Lorenzo-Bianconi/mt76-mt7921-multiple-fixes/20210209-190328
git checkout 716af9b953825b6ade758b0ed48ee2ceceaee289
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=xtensa
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <[email protected]>
All warnings (new ones prefixed by >>):
drivers/net/wireless/mediatek/mt76/mt7921/mac.c: In function 'mt7921_mac_fill_rx':
>> drivers/net/wireless/mediatek/mt76/mt7921/mac.c:403:15: warning: variable 'v2' set but not used [-Wunused-but-set-variable]
403 | u32 v0, v1, v2;
| ^~
vim +/v2 +403 drivers/net/wireless/mediatek/mt76/mt7921/mac.c
163f4d22c118d4 Sean Wang 2021-01-28 287
163f4d22c118d4 Sean Wang 2021-01-28 288 int mt7921_mac_fill_rx(struct mt7921_dev *dev, struct sk_buff *skb)
163f4d22c118d4 Sean Wang 2021-01-28 289 {
163f4d22c118d4 Sean Wang 2021-01-28 290 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
163f4d22c118d4 Sean Wang 2021-01-28 291 struct mt76_phy *mphy = &dev->mt76.phy;
163f4d22c118d4 Sean Wang 2021-01-28 292 struct mt7921_phy *phy = &dev->phy;
163f4d22c118d4 Sean Wang 2021-01-28 293 struct ieee80211_supported_band *sband;
163f4d22c118d4 Sean Wang 2021-01-28 294 struct ieee80211_hdr *hdr;
163f4d22c118d4 Sean Wang 2021-01-28 295 __le32 *rxd = (__le32 *)skb->data;
163f4d22c118d4 Sean Wang 2021-01-28 296 __le32 *rxv = NULL;
163f4d22c118d4 Sean Wang 2021-01-28 297 u32 mode = 0;
163f4d22c118d4 Sean Wang 2021-01-28 298 u32 rxd1 = le32_to_cpu(rxd[1]);
163f4d22c118d4 Sean Wang 2021-01-28 299 u32 rxd2 = le32_to_cpu(rxd[2]);
163f4d22c118d4 Sean Wang 2021-01-28 300 u32 rxd3 = le32_to_cpu(rxd[3]);
163f4d22c118d4 Sean Wang 2021-01-28 301 bool unicast, insert_ccmp_hdr = false;
163f4d22c118d4 Sean Wang 2021-01-28 302 u8 remove_pad;
163f4d22c118d4 Sean Wang 2021-01-28 303 int i, idx;
163f4d22c118d4 Sean Wang 2021-01-28 304 u8 chfreq;
163f4d22c118d4 Sean Wang 2021-01-28 305
163f4d22c118d4 Sean Wang 2021-01-28 306 memset(status, 0, sizeof(*status));
163f4d22c118d4 Sean Wang 2021-01-28 307
163f4d22c118d4 Sean Wang 2021-01-28 308 if (rxd1 & MT_RXD1_NORMAL_BAND_IDX)
163f4d22c118d4 Sean Wang 2021-01-28 309 return -EINVAL;
163f4d22c118d4 Sean Wang 2021-01-28 310
163f4d22c118d4 Sean Wang 2021-01-28 311 if (!test_bit(MT76_STATE_RUNNING, &mphy->state))
163f4d22c118d4 Sean Wang 2021-01-28 312 return -EINVAL;
163f4d22c118d4 Sean Wang 2021-01-28 313
163f4d22c118d4 Sean Wang 2021-01-28 314 chfreq = FIELD_GET(MT_RXD3_NORMAL_CH_FREQ, rxd3);
163f4d22c118d4 Sean Wang 2021-01-28 315 unicast = FIELD_GET(MT_RXD3_NORMAL_ADDR_TYPE, rxd3) == MT_RXD3_NORMAL_U2M;
163f4d22c118d4 Sean Wang 2021-01-28 316 idx = FIELD_GET(MT_RXD1_NORMAL_WLAN_IDX, rxd1);
163f4d22c118d4 Sean Wang 2021-01-28 317 status->wcid = mt7921_rx_get_wcid(dev, idx, unicast);
163f4d22c118d4 Sean Wang 2021-01-28 318
163f4d22c118d4 Sean Wang 2021-01-28 319 if (status->wcid) {
163f4d22c118d4 Sean Wang 2021-01-28 320 struct mt7921_sta *msta;
163f4d22c118d4 Sean Wang 2021-01-28 321
163f4d22c118d4 Sean Wang 2021-01-28 322 msta = container_of(status->wcid, struct mt7921_sta, wcid);
163f4d22c118d4 Sean Wang 2021-01-28 323 spin_lock_bh(&dev->sta_poll_lock);
163f4d22c118d4 Sean Wang 2021-01-28 324 if (list_empty(&msta->poll_list))
163f4d22c118d4 Sean Wang 2021-01-28 325 list_add_tail(&msta->poll_list, &dev->sta_poll_list);
163f4d22c118d4 Sean Wang 2021-01-28 326 spin_unlock_bh(&dev->sta_poll_lock);
163f4d22c118d4 Sean Wang 2021-01-28 327 }
163f4d22c118d4 Sean Wang 2021-01-28 328
163f4d22c118d4 Sean Wang 2021-01-28 329 mt7921_get_status_freq_info(dev, mphy, status, chfreq);
163f4d22c118d4 Sean Wang 2021-01-28 330
163f4d22c118d4 Sean Wang 2021-01-28 331 if (status->band == NL80211_BAND_5GHZ)
163f4d22c118d4 Sean Wang 2021-01-28 332 sband = &mphy->sband_5g.sband;
163f4d22c118d4 Sean Wang 2021-01-28 333 else
163f4d22c118d4 Sean Wang 2021-01-28 334 sband = &mphy->sband_2g.sband;
163f4d22c118d4 Sean Wang 2021-01-28 335
163f4d22c118d4 Sean Wang 2021-01-28 336 if (!sband->channels)
163f4d22c118d4 Sean Wang 2021-01-28 337 return -EINVAL;
163f4d22c118d4 Sean Wang 2021-01-28 338
163f4d22c118d4 Sean Wang 2021-01-28 339 if (rxd1 & MT_RXD1_NORMAL_FCS_ERR)
163f4d22c118d4 Sean Wang 2021-01-28 340 status->flag |= RX_FLAG_FAILED_FCS_CRC;
163f4d22c118d4 Sean Wang 2021-01-28 341
163f4d22c118d4 Sean Wang 2021-01-28 342 if (rxd1 & MT_RXD1_NORMAL_TKIP_MIC_ERR)
163f4d22c118d4 Sean Wang 2021-01-28 343 status->flag |= RX_FLAG_MMIC_ERROR;
163f4d22c118d4 Sean Wang 2021-01-28 344
163f4d22c118d4 Sean Wang 2021-01-28 345 if (FIELD_GET(MT_RXD1_NORMAL_SEC_MODE, rxd1) != 0 &&
163f4d22c118d4 Sean Wang 2021-01-28 346 !(rxd1 & (MT_RXD1_NORMAL_CLM | MT_RXD1_NORMAL_CM))) {
163f4d22c118d4 Sean Wang 2021-01-28 347 status->flag |= RX_FLAG_DECRYPTED;
163f4d22c118d4 Sean Wang 2021-01-28 348 status->flag |= RX_FLAG_IV_STRIPPED;
163f4d22c118d4 Sean Wang 2021-01-28 349 status->flag |= RX_FLAG_MMIC_STRIPPED | RX_FLAG_MIC_STRIPPED;
163f4d22c118d4 Sean Wang 2021-01-28 350 }
163f4d22c118d4 Sean Wang 2021-01-28 351
163f4d22c118d4 Sean Wang 2021-01-28 352 if (!(rxd2 & MT_RXD2_NORMAL_NON_AMPDU)) {
163f4d22c118d4 Sean Wang 2021-01-28 353 status->flag |= RX_FLAG_AMPDU_DETAILS;
163f4d22c118d4 Sean Wang 2021-01-28 354
163f4d22c118d4 Sean Wang 2021-01-28 355 /* all subframes of an A-MPDU have the same timestamp */
163f4d22c118d4 Sean Wang 2021-01-28 356 if (phy->rx_ampdu_ts != rxd[14]) {
163f4d22c118d4 Sean Wang 2021-01-28 357 if (!++phy->ampdu_ref)
163f4d22c118d4 Sean Wang 2021-01-28 358 phy->ampdu_ref++;
163f4d22c118d4 Sean Wang 2021-01-28 359 }
163f4d22c118d4 Sean Wang 2021-01-28 360 phy->rx_ampdu_ts = rxd[14];
163f4d22c118d4 Sean Wang 2021-01-28 361
163f4d22c118d4 Sean Wang 2021-01-28 362 status->ampdu_ref = phy->ampdu_ref;
163f4d22c118d4 Sean Wang 2021-01-28 363 }
163f4d22c118d4 Sean Wang 2021-01-28 364
163f4d22c118d4 Sean Wang 2021-01-28 365 remove_pad = FIELD_GET(MT_RXD2_NORMAL_HDR_OFFSET, rxd2);
163f4d22c118d4 Sean Wang 2021-01-28 366
163f4d22c118d4 Sean Wang 2021-01-28 367 if (rxd2 & MT_RXD2_NORMAL_MAX_LEN_ERROR)
163f4d22c118d4 Sean Wang 2021-01-28 368 return -EINVAL;
163f4d22c118d4 Sean Wang 2021-01-28 369
163f4d22c118d4 Sean Wang 2021-01-28 370 rxd += 6;
163f4d22c118d4 Sean Wang 2021-01-28 371 if (rxd1 & MT_RXD1_NORMAL_GROUP_4) {
163f4d22c118d4 Sean Wang 2021-01-28 372 rxd += 4;
163f4d22c118d4 Sean Wang 2021-01-28 373 if ((u8 *)rxd - skb->data >= skb->len)
163f4d22c118d4 Sean Wang 2021-01-28 374 return -EINVAL;
163f4d22c118d4 Sean Wang 2021-01-28 375 }
163f4d22c118d4 Sean Wang 2021-01-28 376
163f4d22c118d4 Sean Wang 2021-01-28 377 if (rxd1 & MT_RXD1_NORMAL_GROUP_1) {
163f4d22c118d4 Sean Wang 2021-01-28 378 u8 *data = (u8 *)rxd;
163f4d22c118d4 Sean Wang 2021-01-28 379
163f4d22c118d4 Sean Wang 2021-01-28 380 if (status->flag & RX_FLAG_DECRYPTED) {
163f4d22c118d4 Sean Wang 2021-01-28 381 status->iv[0] = data[5];
163f4d22c118d4 Sean Wang 2021-01-28 382 status->iv[1] = data[4];
163f4d22c118d4 Sean Wang 2021-01-28 383 status->iv[2] = data[3];
163f4d22c118d4 Sean Wang 2021-01-28 384 status->iv[3] = data[2];
163f4d22c118d4 Sean Wang 2021-01-28 385 status->iv[4] = data[1];
163f4d22c118d4 Sean Wang 2021-01-28 386 status->iv[5] = data[0];
163f4d22c118d4 Sean Wang 2021-01-28 387
163f4d22c118d4 Sean Wang 2021-01-28 388 insert_ccmp_hdr = FIELD_GET(MT_RXD2_NORMAL_FRAG, rxd2);
163f4d22c118d4 Sean Wang 2021-01-28 389 }
163f4d22c118d4 Sean Wang 2021-01-28 390 rxd += 4;
163f4d22c118d4 Sean Wang 2021-01-28 391 if ((u8 *)rxd - skb->data >= skb->len)
163f4d22c118d4 Sean Wang 2021-01-28 392 return -EINVAL;
163f4d22c118d4 Sean Wang 2021-01-28 393 }
163f4d22c118d4 Sean Wang 2021-01-28 394
163f4d22c118d4 Sean Wang 2021-01-28 395 if (rxd1 & MT_RXD1_NORMAL_GROUP_2) {
163f4d22c118d4 Sean Wang 2021-01-28 396 rxd += 2;
163f4d22c118d4 Sean Wang 2021-01-28 397 if ((u8 *)rxd - skb->data >= skb->len)
163f4d22c118d4 Sean Wang 2021-01-28 398 return -EINVAL;
163f4d22c118d4 Sean Wang 2021-01-28 399 }
163f4d22c118d4 Sean Wang 2021-01-28 400
163f4d22c118d4 Sean Wang 2021-01-28 401 /* RXD Group 3 - P-RXV */
163f4d22c118d4 Sean Wang 2021-01-28 402 if (rxd1 & MT_RXD1_NORMAL_GROUP_3) {
163f4d22c118d4 Sean Wang 2021-01-28 @403 u32 v0, v1, v2;
716af9b953825b Sean Wang 2021-02-09 404 u8 stbc, gi;
716af9b953825b Sean Wang 2021-02-09 405 bool cck;
163f4d22c118d4 Sean Wang 2021-01-28 406
163f4d22c118d4 Sean Wang 2021-01-28 407 rxv = rxd;
163f4d22c118d4 Sean Wang 2021-01-28 408 rxd += 2;
163f4d22c118d4 Sean Wang 2021-01-28 409 if ((u8 *)rxd - skb->data >= skb->len)
163f4d22c118d4 Sean Wang 2021-01-28 410 return -EINVAL;
163f4d22c118d4 Sean Wang 2021-01-28 411
163f4d22c118d4 Sean Wang 2021-01-28 412 v0 = le32_to_cpu(rxv[0]);
163f4d22c118d4 Sean Wang 2021-01-28 413 v1 = le32_to_cpu(rxv[1]);
163f4d22c118d4 Sean Wang 2021-01-28 414 v2 = le32_to_cpu(rxv[2]);
163f4d22c118d4 Sean Wang 2021-01-28 415
163f4d22c118d4 Sean Wang 2021-01-28 416 if (v0 & MT_PRXV_HT_AD_CODE)
163f4d22c118d4 Sean Wang 2021-01-28 417 status->enc_flags |= RX_ENC_FLAG_LDPC;
163f4d22c118d4 Sean Wang 2021-01-28 418
163f4d22c118d4 Sean Wang 2021-01-28 419 status->chains = mphy->antenna_mask;
163f4d22c118d4 Sean Wang 2021-01-28 420 status->chain_signal[0] = to_rssi(MT_PRXV_RCPI0, v1);
163f4d22c118d4 Sean Wang 2021-01-28 421 status->chain_signal[1] = to_rssi(MT_PRXV_RCPI1, v1);
163f4d22c118d4 Sean Wang 2021-01-28 422 status->chain_signal[2] = to_rssi(MT_PRXV_RCPI2, v1);
163f4d22c118d4 Sean Wang 2021-01-28 423 status->chain_signal[3] = to_rssi(MT_PRXV_RCPI3, v1);
163f4d22c118d4 Sean Wang 2021-01-28 424 status->signal = status->chain_signal[0];
163f4d22c118d4 Sean Wang 2021-01-28 425
163f4d22c118d4 Sean Wang 2021-01-28 426 for (i = 1; i < hweight8(mphy->antenna_mask); i++) {
163f4d22c118d4 Sean Wang 2021-01-28 427 if (!(status->chains & BIT(i)))
163f4d22c118d4 Sean Wang 2021-01-28 428 continue;
163f4d22c118d4 Sean Wang 2021-01-28 429
163f4d22c118d4 Sean Wang 2021-01-28 430 status->signal = max(status->signal,
163f4d22c118d4 Sean Wang 2021-01-28 431 status->chain_signal[i]);
163f4d22c118d4 Sean Wang 2021-01-28 432 }
163f4d22c118d4 Sean Wang 2021-01-28 433
716af9b953825b Sean Wang 2021-02-09 434 stbc = FIELD_GET(MT_PRXV_STBC, v0);
716af9b953825b Sean Wang 2021-02-09 435 gi = FIELD_GET(MT_PRXV_SGI, v0);
716af9b953825b Sean Wang 2021-02-09 436 cck = false;
163f4d22c118d4 Sean Wang 2021-01-28 437
163f4d22c118d4 Sean Wang 2021-01-28 438 idx = i = FIELD_GET(MT_PRXV_TX_RATE, v0);
716af9b953825b Sean Wang 2021-02-09 439 mode = FIELD_GET(MT_PRXV_TX_MODE, v0);
163f4d22c118d4 Sean Wang 2021-01-28 440
163f4d22c118d4 Sean Wang 2021-01-28 441 switch (mode) {
163f4d22c118d4 Sean Wang 2021-01-28 442 case MT_PHY_TYPE_CCK:
163f4d22c118d4 Sean Wang 2021-01-28 443 cck = true;
163f4d22c118d4 Sean Wang 2021-01-28 444 fallthrough;
163f4d22c118d4 Sean Wang 2021-01-28 445 case MT_PHY_TYPE_OFDM:
163f4d22c118d4 Sean Wang 2021-01-28 446 i = mt76_get_rate(&dev->mt76, sband, i, cck);
163f4d22c118d4 Sean Wang 2021-01-28 447 break;
163f4d22c118d4 Sean Wang 2021-01-28 448 case MT_PHY_TYPE_HT_GF:
163f4d22c118d4 Sean Wang 2021-01-28 449 case MT_PHY_TYPE_HT:
163f4d22c118d4 Sean Wang 2021-01-28 450 status->encoding = RX_ENC_HT;
163f4d22c118d4 Sean Wang 2021-01-28 451 if (i > 31)
163f4d22c118d4 Sean Wang 2021-01-28 452 return -EINVAL;
163f4d22c118d4 Sean Wang 2021-01-28 453 break;
163f4d22c118d4 Sean Wang 2021-01-28 454 case MT_PHY_TYPE_VHT:
163f4d22c118d4 Sean Wang 2021-01-28 455 status->nss =
163f4d22c118d4 Sean Wang 2021-01-28 456 FIELD_GET(MT_PRXV_NSTS, v0) + 1;
163f4d22c118d4 Sean Wang 2021-01-28 457 status->encoding = RX_ENC_VHT;
163f4d22c118d4 Sean Wang 2021-01-28 458 if (i > 9)
163f4d22c118d4 Sean Wang 2021-01-28 459 return -EINVAL;
163f4d22c118d4 Sean Wang 2021-01-28 460 break;
163f4d22c118d4 Sean Wang 2021-01-28 461 case MT_PHY_TYPE_HE_MU:
163f4d22c118d4 Sean Wang 2021-01-28 462 status->flag |= RX_FLAG_RADIOTAP_HE_MU;
163f4d22c118d4 Sean Wang 2021-01-28 463 fallthrough;
163f4d22c118d4 Sean Wang 2021-01-28 464 case MT_PHY_TYPE_HE_SU:
163f4d22c118d4 Sean Wang 2021-01-28 465 case MT_PHY_TYPE_HE_EXT_SU:
163f4d22c118d4 Sean Wang 2021-01-28 466 case MT_PHY_TYPE_HE_TB:
163f4d22c118d4 Sean Wang 2021-01-28 467 status->nss =
163f4d22c118d4 Sean Wang 2021-01-28 468 FIELD_GET(MT_PRXV_NSTS, v0) + 1;
163f4d22c118d4 Sean Wang 2021-01-28 469 status->encoding = RX_ENC_HE;
163f4d22c118d4 Sean Wang 2021-01-28 470 status->flag |= RX_FLAG_RADIOTAP_HE;
163f4d22c118d4 Sean Wang 2021-01-28 471 i &= GENMASK(3, 0);
163f4d22c118d4 Sean Wang 2021-01-28 472
163f4d22c118d4 Sean Wang 2021-01-28 473 if (gi <= NL80211_RATE_INFO_HE_GI_3_2)
163f4d22c118d4 Sean Wang 2021-01-28 474 status->he_gi = gi;
163f4d22c118d4 Sean Wang 2021-01-28 475
163f4d22c118d4 Sean Wang 2021-01-28 476 status->he_dcm = !!(idx & MT_PRXV_TX_DCM);
163f4d22c118d4 Sean Wang 2021-01-28 477 break;
163f4d22c118d4 Sean Wang 2021-01-28 478 default:
163f4d22c118d4 Sean Wang 2021-01-28 479 return -EINVAL;
163f4d22c118d4 Sean Wang 2021-01-28 480 }
716af9b953825b Sean Wang 2021-02-09 481
163f4d22c118d4 Sean Wang 2021-01-28 482 status->rate_idx = i;
163f4d22c118d4 Sean Wang 2021-01-28 483
716af9b953825b Sean Wang 2021-02-09 484 switch (FIELD_GET(MT_PRXV_FRAME_MODE, v0)) {
163f4d22c118d4 Sean Wang 2021-01-28 485 case IEEE80211_STA_RX_BW_20:
163f4d22c118d4 Sean Wang 2021-01-28 486 break;
163f4d22c118d4 Sean Wang 2021-01-28 487 case IEEE80211_STA_RX_BW_40:
163f4d22c118d4 Sean Wang 2021-01-28 488 if (mode & MT_PHY_TYPE_HE_EXT_SU &&
163f4d22c118d4 Sean Wang 2021-01-28 489 (idx & MT_PRXV_TX_ER_SU_106T)) {
163f4d22c118d4 Sean Wang 2021-01-28 490 status->bw = RATE_INFO_BW_HE_RU;
163f4d22c118d4 Sean Wang 2021-01-28 491 status->he_ru =
163f4d22c118d4 Sean Wang 2021-01-28 492 NL80211_RATE_INFO_HE_RU_ALLOC_106;
163f4d22c118d4 Sean Wang 2021-01-28 493 } else {
163f4d22c118d4 Sean Wang 2021-01-28 494 status->bw = RATE_INFO_BW_40;
163f4d22c118d4 Sean Wang 2021-01-28 495 }
163f4d22c118d4 Sean Wang 2021-01-28 496 break;
163f4d22c118d4 Sean Wang 2021-01-28 497 case IEEE80211_STA_RX_BW_80:
163f4d22c118d4 Sean Wang 2021-01-28 498 status->bw = RATE_INFO_BW_80;
163f4d22c118d4 Sean Wang 2021-01-28 499 break;
163f4d22c118d4 Sean Wang 2021-01-28 500 case IEEE80211_STA_RX_BW_160:
163f4d22c118d4 Sean Wang 2021-01-28 501 status->bw = RATE_INFO_BW_160;
163f4d22c118d4 Sean Wang 2021-01-28 502 break;
163f4d22c118d4 Sean Wang 2021-01-28 503 default:
163f4d22c118d4 Sean Wang 2021-01-28 504 return -EINVAL;
163f4d22c118d4 Sean Wang 2021-01-28 505 }
163f4d22c118d4 Sean Wang 2021-01-28 506
163f4d22c118d4 Sean Wang 2021-01-28 507 status->enc_flags |= RX_ENC_FLAG_STBC_MASK * stbc;
163f4d22c118d4 Sean Wang 2021-01-28 508 if (mode < MT_PHY_TYPE_HE_SU && gi)
163f4d22c118d4 Sean Wang 2021-01-28 509 status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
716af9b953825b Sean Wang 2021-02-09 510
716af9b953825b Sean Wang 2021-02-09 511 if (rxd1 & MT_RXD1_NORMAL_GROUP_5) {
716af9b953825b Sean Wang 2021-02-09 512 rxd += 18;
716af9b953825b Sean Wang 2021-02-09 513 if ((u8 *)rxd - skb->data >= skb->len)
716af9b953825b Sean Wang 2021-02-09 514 return -EINVAL;
163f4d22c118d4 Sean Wang 2021-01-28 515 }
163f4d22c118d4 Sean Wang 2021-01-28 516 }
163f4d22c118d4 Sean Wang 2021-01-28 517
163f4d22c118d4 Sean Wang 2021-01-28 518 skb_pull(skb, (u8 *)rxd - skb->data + 2 * remove_pad);
163f4d22c118d4 Sean Wang 2021-01-28 519
163f4d22c118d4 Sean Wang 2021-01-28 520 if (insert_ccmp_hdr) {
163f4d22c118d4 Sean Wang 2021-01-28 521 u8 key_id = FIELD_GET(MT_RXD1_NORMAL_KEY_ID, rxd1);
163f4d22c118d4 Sean Wang 2021-01-28 522
163f4d22c118d4 Sean Wang 2021-01-28 523 mt76_insert_ccmp_hdr(skb, key_id);
163f4d22c118d4 Sean Wang 2021-01-28 524 }
163f4d22c118d4 Sean Wang 2021-01-28 525
163f4d22c118d4 Sean Wang 2021-01-28 526 if (rxv && status->flag & RX_FLAG_RADIOTAP_HE)
163f4d22c118d4 Sean Wang 2021-01-28 527 mt7921_mac_decode_he_radiotap(skb, status, rxv, mode);
163f4d22c118d4 Sean Wang 2021-01-28 528
163f4d22c118d4 Sean Wang 2021-01-28 529 hdr = mt76_skb_get_hdr(skb);
163f4d22c118d4 Sean Wang 2021-01-28 530 if (!status->wcid || !ieee80211_is_data_qos(hdr->frame_control))
163f4d22c118d4 Sean Wang 2021-01-28 531 return 0;
163f4d22c118d4 Sean Wang 2021-01-28 532
163f4d22c118d4 Sean Wang 2021-01-28 533 status->aggr = unicast &&
163f4d22c118d4 Sean Wang 2021-01-28 534 !ieee80211_is_qos_nullfunc(hdr->frame_control);
163f4d22c118d4 Sean Wang 2021-01-28 535 status->tid = *ieee80211_get_qos_ctl(hdr) & IEEE80211_QOS_CTL_TID_MASK;
163f4d22c118d4 Sean Wang 2021-01-28 536 status->seqno = IEEE80211_SEQ_TO_SN(le16_to_cpu(hdr->seq_ctrl));
163f4d22c118d4 Sean Wang 2021-01-28 537
163f4d22c118d4 Sean Wang 2021-01-28 538 return 0;
163f4d22c118d4 Sean Wang 2021-01-28 539 }
163f4d22c118d4 Sean Wang 2021-01-28 540
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/[email protected]