Return-path: Received: from mail-iw0-f180.google.com ([209.85.223.180]:52051 "EHLO mail-iw0-f180.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932978AbZKDVwV convert rfc822-to-8bit (ORCPT ); Wed, 4 Nov 2009 16:52:21 -0500 Received: by iwn10 with SMTP id 10so5307431iwn.4 for ; Wed, 04 Nov 2009 13:52:26 -0800 (PST) MIME-Version: 1.0 In-Reply-To: <43e72e890911041336n7ffae0d2u135321a588f3e613@mail.gmail.com> References: <43e72e890911041204n55b54f8iace79938b40baa32@mail.gmail.com> <40f31dec0911041212p16cfc78eia1ab1817e425e767@mail.gmail.com> <43e72e890911041330j581e7bacp4e7b83a11c1de0e8@mail.gmail.com> <43e72e890911041336n7ffae0d2u135321a588f3e613@mail.gmail.com> From: "Luis R. Rodriguez" Date: Wed, 4 Nov 2009 13:52:06 -0800 Message-ID: <43e72e890911041352i334e170at71a519383d48a08@mail.gmail.com> Subject: Re: pci_set_mwi() and ath5k To: Nick Kossifidis Cc: linux-wireless , ath5k-devel@lists.ath5k.org, Matthew Wilcox , Stephen Hemminger , Kyle McMartin Content-Type: text/plain; charset=UTF-8 Sender: linux-wireless-owner@vger.kernel.org List-ID: On Wed, Nov 4, 2009 at 1:36 PM, Luis R. Rodriguez wrote: > On Wed, Nov 4, 2009 at 1:30 PM, Luis R. Rodriguez wrote: >> On Wed, Nov 4, 2009 at 12:12 PM, Nick Kossifidis wrote: >>> 2009/11/4 Luis R. Rodriguez : >>>> Curious if anyone recalls the issues seen with enabling MWI on ath5k. >>>> I could have sworn there was some discussion on this but for the life >>>> of me I cannot find it. >>>> >>>>  Luis >>> >>> Maybe this one ? >>> http://osdir.com/ml/linux.drivers.ath5k.devel/2008-07/msg00088.html >> >> That was it, thanks! For the record then Kyle pointed to this bug: >> >> http://marc.info/?t=121430463700001&r=1&w=2 >> >> as a reference for possible issues. > > Actually the threads above are for MSI, not MWI, which would be set > with pci_set_mwi() not pci_disable_msi(). > > MWI is for enabling memory write invalidate. > > I guess we never had the MWI discussion then for ath5k, > > Either way I'm reluctant to enable it and was actually considering > simplifying the the PCI cache line size thing on ath/ath5k/ath9k. Will > send an RFC. Even better: I just confirmation from our systems team that our legacy devices and 11n PCI devices don't support MWR so I'll remove all that cruft crap. Luis