From: Sujith Manoharan <sujith@msujith.org>
To: "Luis R. Rodriguez" <mcgrof@qca.qualcomm.com>
Cc: linux-wireless@vger.kernel.org
Subject: [PATCH] qca-swiss-army-knife: Update initvals for AR9340
Date: Mon, 10 Dec 2012 08:20:06 +0530
Message-Id: <1355107806-32675-1-git-send-email-sujith@msujith.org> (sfid-20121210_035053_752254_4BEFD1EE)
Sender: linux-wireless-owner@vger.kernel.org

From: Sujith Manoharan <c_manoha@qca.qualcomm.com>

The SLP32_MODE/INC registers have to be programmed with
values based on the ref. clock, which could be either 25MHz
or 40MHz. Incorrect values in these registers results in
TSF drift.

Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
---
 tools/initvals/ar9340_initvals.h | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/tools/initvals/ar9340_initvals.h b/tools/initvals/ar9340_initvals.h
index 1d8235e..f69d292 100644
--- a/tools/initvals/ar9340_initvals.h
+++ b/tools/initvals/ar9340_initvals.h
@@ -211,6 +211,8 @@ static const u32 ar9340_1p0_radio_core_40M[][2] = {
 	{0x0001609c, 0x02566f3a},
 	{0x000160ac, 0xa4647c00},
 	{0x000160b0, 0x01885f5a},
+	{0x00008244, 0x0010f400},
+	{0x0000824c, 0x0001e800},
 };
 
 #define ar9340_1p0_mac_postamble ar9300_2p2_mac_postamble
@@ -1273,9 +1275,9 @@ static const u32 ar9340_1p0_mac_core[][2] = {
 	{0x000081f8, 0x00000000},
 	{0x000081fc, 0x00000000},
 	{0x00008240, 0x00100000},
-	{0x00008244, 0x0010f424},
+	{0x00008244, 0x0010f3d7},
 	{0x00008248, 0x00000800},
-	{0x0000824c, 0x0001e848},
+	{0x0000824c, 0x0001e7ae},
 	{0x00008250, 0x00000000},
 	{0x00008254, 0x00000000},
 	{0x00008258, 0x00000000},
-- 
1.8.0.1