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Subject: Re: [PATCH V2 6/8] brcmfmac: update 43012 F2 watermark setting to fix
 DMA Error during UDP RX Traffic
To:     Chi-Hsien Lin <Chi-Hsien.Lin@cypress.com>,
        "linux-wireless@vger.kernel.org" <linux-wireless@vger.kernel.org>
References: <1542007730-47284-1-git-send-email-chi-hsien.lin@cypress.com>
 <1542007730-47284-7-git-send-email-chi-hsien.lin@cypress.com>
Cc:     "brcm80211-dev-list@broadcom.com" <brcm80211-dev-list@broadcom.com>,
        brcm80211-dev-list <brcm80211-dev-list@cypress.com>,
        Franky Lin <franky.lin@broadcom.com>,
        Hante Meuleman <hante.meuleman@broadcom.com>,
        Wright Feng <Wright.Feng@cypress.com>,
        Kalle Valo <kvalo@codeaurora.org>,
        Naveen Gupta <Naveen.Gupta@cypress.com>
From:   Arend van Spriel <arend.vanspriel@broadcom.com>
Message-ID: <5ed63f80-c599-3b34-05bc-b721b4af2a1d@broadcom.com>
Date:   Mon, 12 Nov 2018 10:25:58 +0100
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On 11/12/2018 8:29 AM, Chi-Hsien Lin wrote:
> From: Naveen Gupta <naveen.gupta@cypress.com>
>
> The number of words that the read FIFO has to contain except
> the end of frame before sends data back to the host.
> Max watermark = (512B - 2* (BurstLength))/4 =
> (512 - 128)/4 = 384/4 = 0x60
> so if burst length (i.e. BurstLength = 64) is increased,
> watermark has to be reduced. This is the optimal setting for this chip.
>
> Reviewed-by: Arend van Spriel <arend.vanspriel@broadcom.com>
> Signed-off-by: Naveen Gupta <naveen.gupta@cypress.com>
> Signed-off-by: Chi-Hsien Lin <chi-hsien.lin@cypress.com>
> ---
>  drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
>
> diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
> index 7707b0169c21..e1708e297d07 100644
> --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
> +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
> @@ -52,6 +52,7 @@
>  /* watermark expressed in number of words */
>  #define DEFAULT_F2_WATERMARK    0x8
>  #define CY_4373_F2_WATERMARK    0x40
> +#define CY_43012_F2_WATERMARK    0x60

So basically you increase queuing in firmware rx path. How does this 
affect TCP latency. The DMA error obviously needs fixing, but why go 
from a watermark of 32 bytes to the maximum of 384 bytes. Same question 
for 4373.

Regards,
Arend