Subject: Re: [PATCH] ath10k: Fix ASPM L1 state on QCA988X
To:     =?UTF-8?Q?Tomislav_Po=c5=beega?= <pozega.tomislav@gmail.com>,
        linux-wireless@vger.kernel.org
Cc:     kvalo@codeaurora.org, Sujith Manoharan <c_manoha@qca.qualcomm.com>
References: <1553025580-6118-1-git-send-email-pozega.tomislav@gmail.com>
From:   Ben Greear <greearb@candelatech.com>
Organization: Candela Technologies
Message-ID: <2715bcef-5b03-fc19-e665-3c6f90a7d123@candelatech.com>
Date:   Wed, 20 Mar 2019 08:12:16 -0700
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On 3/19/19 12:59 PM, Tomislav Požega wrote:
> On some systems there are heavy crashes if the kernel config
> option CONFIG_PCIEASPM_PERFORMANCE is not set. Patch provided by
> Sujith for ath9k fixes this issue and the card operates without
> crashes with kernel default CONFIG_PCIEASPM_DEFAULT option that uses
> BIOS provided ASPM settings. Tested with QCA9862 mPCIe card.

Hello,

Were these firmware crashes or system crashes or both?  Can you
describe that a bit more so we can better understand what bugs this
is fixing?


Thanks,
Ben

> 
> Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
> Signed-off-by: Tomislav Požega <pozega.tomislav@gmail.com>
> ---
>   drivers/net/wireless/ath/ath10k/pci.c |   15 +++++++++++++--
>   1 files changed, 13 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/ath/ath10k/pci.c
> index 271f92c..e24403c 100644
> --- a/drivers/net/wireless/ath/ath10k/pci.c
> +++ b/drivers/net/wireless/ath/ath10k/pci.c
> @@ -2787,14 +2787,25 @@ static int ath10k_pci_hif_power_up(struct ath10k *ar,
>   				   enum ath10k_firmware_mode fw_mode)
>   {
>   	struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
> +	struct pci_dev *pdev = ar_pci->pdev;
>   	int ret;
> +	u32 val;
>   
>   	ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot hif power up\n");
>   
> -	pcie_capability_read_word(ar_pci->pdev, PCI_EXP_LNKCTL,
> +	if (ar->dev_id == QCA988X_2_0_DEVICE_ID) {
> +		pci_read_config_dword(pdev, 0x70c, &val);
> +		if ((val & 0xff000000) == 0x17000000) {
> +			val &= 0x00ffffff;
> +			val |= 0x27000000;
> +			pci_write_config_dword(pdev, 0x570c, val);
> +		}
> +	} else {
> +		pcie_capability_read_word(ar_pci->pdev, PCI_EXP_LNKCTL,
>   				  &ar_pci->link_ctl);
> -	pcie_capability_write_word(ar_pci->pdev, PCI_EXP_LNKCTL,
> +		pcie_capability_write_word(ar_pci->pdev, PCI_EXP_LNKCTL,
>   				   ar_pci->link_ctl & ~PCI_EXP_LNKCTL_ASPMC);
> +	}
>   
>   	/*
>   	 * Bring the target up cleanly.
> 


-- 
Ben Greear <greearb@candelatech.com>
Candela Technologies Inc  http://www.candelatech.com