Received-SPF: pass (google.com: best guess record for domain of linux-wireless-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
Content-Type: text/plain;
        charset=utf-8
Mime-Version: 1.0 (1.0)
Subject: Re: [PATCH v3 4/5] rtw88: add set_bitrate_mask support
From:   Chris Chiu <chiu@endlessm.com>
In-Reply-To: <F7CD281DE3E379468C6D07993EA72F84D1906A22@RTITMBSVM04.realtek.com.tw>
Date:   Wed, 23 Oct 2019 11:15:13 +0800
Cc:     Pkshih <pkshih@realtek.com>, Kalle Valo <kvalo@codeaurora.org>,
        linux-wireless <linux-wireless@vger.kernel.org>,
        Brian Norris <briannorris@chromium.org>
Content-Transfer-Encoding: quoted-printable
Message-Id: <183D4FCE-9BE9-4D11-8D3F-E338823E3ADE@endlessm.com>
References: <20191022100420.25116-1-yhchuang@realtek.com> <20191022100420.25116-5-yhchuang@realtek.com> <CAB4CAwcBUHMR3btH9LGd=GzqU1mRmfmL0o4EOY4E8H1OxfpvMg@mail.gmail.com> <5B2DA6FDDF928F4E855344EE0A5C39D1D5C88DA8@RTITMBSVM04.realtek.com.tw> <F7CD281DE3E379468C6D07993EA72F84D1906A22@RTITMBSVM04.realtek.com.tw>
To:     Tony Chuang <yhchuang@realtek.com>
Sender: linux-wireless-owner@vger.kernel.org
Precedence: bulk


Tony Chuang <yhchuang@realtek.com> =E6=96=BC 2019=E5=B9=B410=E6=9C=8823=E6=97=
=A5 =E4=B8=8A=E5=8D=8810:37 =E5=AF=AB=E9=81=93=EF=BC=9A

>> [mailto:linux-wireless-owner@vger.kernel.org] On Behalf
>>> Of Chris Chiu
>>> Sent: Tuesday, October 22, 2019 8:49 PM
>>> To: Tony Chuang
>>> Cc: Kalle Valo; linux-wireless; Brian Norris
>>> Subject: Re: [PATCH v3 4/5] rtw88: add set_bitrate_mask support
>>>=20
>>>> On Tue, Oct 22, 2019 at 6:04 PM <yhchuang@realtek.com> wrote:
>>>>=20
>>>> From: Tzu-En Huang <tehuang@realtek.com>
>>>>=20
>>>> Support setting bit rate from upper layer.
>>>> After configuring the original rate control result in the driver, the
>>>> result is then masked by the bit rate mask received from the ops
>>>> set_bitrate_mask. Lastly, the masked result will be sent to firmware.
>>>>=20
>>>> Signed-off-by: Tzu-En Huang <tehuang@realtek.com>
>>>> Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com>
Reviewed-by: Chris Chiu <chiu@endlessm.com>

>>>> ---
>>>>=20
>>>> v1 -> v2
>>>>  * No change
>>>>=20
>>>> v2 -> v3
>>>>  * use u64_encode_bits
>>>>=20
>>>> +static u64 rtw_update_rate_mask(struct rtw_dev *rtwdev,
>>>> +                               struct rtw_sta_info *si,
>>>> +                               u64 ra_mask, bool is_vht_enable,
>>>> +                               u8 wireless_set)
>>>> +{
>>>> +       struct rtw_hal *hal =3D &rtwdev->hal;
>>>> +       const struct cfg80211_bitrate_mask *mask =3D si->mask;
>>>> +       u64 cfg_mask =3D GENMASK(63, 0);
>>>> +       u8 rssi_level, band;
>>>> +
>>>> +       if (wireless_set !=3D WIRELESS_CCK) {
>>>> +               rssi_level =3D si->rssi_level;
>>>> +               if (rssi_level =3D=3D 0)
>>>> +                       ra_mask &=3D 0xffffffffffffffffULL;
>>>> +               else if (rssi_level =3D=3D 1)
>>>> +                       ra_mask &=3D 0xfffffffffffffff0ULL;
>>>> +               else if (rssi_level =3D=3D 2)
>>>> +                       ra_mask &=3D 0xffffffffffffefe0ULL;
>>>> +               else if (rssi_level =3D=3D 3)
>>>> +                       ra_mask &=3D 0xffffffffffffcfc0ULL;
>>>> +               else if (rssi_level =3D=3D 4)
>>>> +                       ra_mask &=3D 0xffffffffffff8f80ULL;
>>>> +               else if (rssi_level >=3D 5)
>>>> +                       ra_mask &=3D 0xffffffffffff0f00ULL;
>>>> +       }
>>>=20
>>> Would be better to enumerate rssi_level instead of 0 to 5. Does level
>>> 0 means bad rssi or good?
>>>=20
>=20
> I think 0 is the lowest level. And I think we don't need to add an enum fo=
r
> this kind of levels, as the number just presents the meaning of it.
>=20
> Yan-Hsuan

OK. I think it also makes sense to me.

Chris=