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        <Adham.Abozaeid@microchip.com>, <johannes@sipsolutions.net>,
        <Ajay.Kathat@microchip.com>
Subject: [PATCH 6/8] staging: wilc1000: define macros for different register
 address for SDIO
Thread-Topic: [PATCH 6/8] staging: wilc1000: define macros for different
 register address for SDIO
Thread-Index: AQHV4y02d5Z3dnBw90ulNuON4rAHrg==
Date:   Fri, 14 Feb 2020 11:52:21 +0000
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From: Ajay Singh <ajay.kathat@microchip.com>

Instead of using hardcoded value for SDIO register address added the
macro for them.

Signed-off-by: Ajay Singh <ajay.kathat@microchip.com>
---
 drivers/staging/wilc1000/sdio.c | 77 +++++++++++++++++----------------
 drivers/staging/wilc1000/wlan.h | 36 +++++++++++++++
 2 files changed, 76 insertions(+), 37 deletions(-)

diff --git a/drivers/staging/wilc1000/sdio.c b/drivers/staging/wilc1000/sdi=
o.c
index 57c0e8415bc9..0670c5956aef 100644
--- a/drivers/staging/wilc1000/sdio.c
+++ b/drivers/staging/wilc1000/sdio.c
@@ -183,8 +183,8 @@ static int wilc_sdio_reset(struct wilc *wilc)
 	cmd.read_write =3D 1;
 	cmd.function =3D 0;
 	cmd.raw =3D 0;
-	cmd.address =3D 0x6;
-	cmd.data =3D 0x8;
+	cmd.address =3D SDIO_CCCR_ABORT;
+	cmd.data =3D WILC_SDIO_CCCR_ABORT_RESET;
 	ret =3D wilc_sdio_cmd52(wilc, &cmd);
 	if (ret) {
 		dev_err(&func->dev, "Fail cmd 52, reset cmd ...\n");
@@ -266,27 +266,30 @@ static int wilc_sdio_set_func0_csa_address(struct wil=
c *wilc, u32 adr)
 	cmd.read_write =3D 1;
 	cmd.function =3D 0;
 	cmd.raw =3D 0;
-	cmd.address =3D 0x10c;
+	cmd.address =3D WILC_SDIO_FBR_CSA_REG;
 	cmd.data =3D (u8)adr;
 	ret =3D wilc_sdio_cmd52(wilc, &cmd);
 	if (ret) {
-		dev_err(&func->dev, "Failed cmd52, set 0x10c data...\n");
+		dev_err(&func->dev, "Failed cmd52, set %04x data...\n",
+			cmd.address);
 		return ret;
 	}
=20
-	cmd.address =3D 0x10d;
+	cmd.address =3D WILC_SDIO_FBR_CSA_REG + 1;
 	cmd.data =3D (u8)(adr >> 8);
 	ret =3D wilc_sdio_cmd52(wilc, &cmd);
 	if (ret) {
-		dev_err(&func->dev, "Failed cmd52, set 0x10d data...\n");
+		dev_err(&func->dev, "Failed cmd52, set %04x data...\n",
+			cmd.address);
 		return ret;
 	}
=20
-	cmd.address =3D 0x10e;
+	cmd.address =3D WILC_SDIO_FBR_CSA_REG + 2;
 	cmd.data =3D (u8)(adr >> 16);
 	ret =3D wilc_sdio_cmd52(wilc, &cmd);
 	if (ret) {
-		dev_err(&func->dev, "Failed cmd52, set 0x10e data...\n");
+		dev_err(&func->dev, "Failed cmd52, set %04x data...\n",
+			cmd.address);
 		return ret;
 	}
=20
@@ -337,7 +340,7 @@ static int wilc_sdio_write_reg(struct wilc *wilc, u32 a=
ddr, u32 data)
=20
 	cpu_to_le32s(&data);
=20
-	if (addr >=3D 0xf0 && addr <=3D 0xff) {
+	if (addr >=3D 0xf0 && addr <=3D 0xff) { /* only vendor specific registers=
 */
 		struct sdio_cmd52 cmd;
=20
 		cmd.read_write =3D 1;
@@ -361,7 +364,7 @@ static int wilc_sdio_write_reg(struct wilc *wilc, u32 a=
ddr, u32 data)
=20
 		cmd.read_write =3D 1;
 		cmd.function =3D 0;
-		cmd.address =3D 0x10f;
+		cmd.address =3D WILC_SDIO_FBR_DATA_REG;
 		cmd.block_mode =3D 0;
 		cmd.increment =3D 1;
 		cmd.count =3D 4;
@@ -390,13 +393,13 @@ static int wilc_sdio_write(struct wilc *wilc, u32 add=
r, u8 *buf, u32 size)
 		 *      func 0 access
 		 **/
 		cmd.function =3D 0;
-		cmd.address =3D 0x10f;
+		cmd.address =3D WILC_SDIO_FBR_DATA_REG;
 	} else {
 		/**
 		 *      func 1 access
 		 **/
 		cmd.function =3D 1;
-		cmd.address =3D 0;
+		cmd.address =3D WILC_SDIO_F1_DATA_REG;
 	}
=20
 	size =3D ALIGN(size, 4);
@@ -455,7 +458,7 @@ static int wilc_sdio_read_reg(struct wilc *wilc, u32 ad=
dr, u32 *data)
 	struct wilc_sdio *sdio_priv =3D wilc->bus_data;
 	int ret;
=20
-	if (addr >=3D 0xf0 && addr <=3D 0xff) {
+	if (addr >=3D 0xf0 && addr <=3D 0xff) { /* only vendor specific registers=
 */
 		struct sdio_cmd52 cmd;
=20
 		cmd.read_write =3D 0;
@@ -478,7 +481,7 @@ static int wilc_sdio_read_reg(struct wilc *wilc, u32 ad=
dr, u32 *data)
=20
 		cmd.read_write =3D 0;
 		cmd.function =3D 0;
-		cmd.address =3D 0x10f;
+		cmd.address =3D WILC_SDIO_FBR_DATA_REG;
 		cmd.block_mode =3D 0;
 		cmd.increment =3D 1;
 		cmd.count =3D 4;
@@ -511,13 +514,13 @@ static int wilc_sdio_read(struct wilc *wilc, u32 addr=
, u8 *buf, u32 size)
 		 *      func 0 access
 		 **/
 		cmd.function =3D 0;
-		cmd.address =3D 0x10f;
+		cmd.address =3D WILC_SDIO_FBR_DATA_REG;
 	} else {
 		/**
 		 *      func 1 access
 		 **/
 		cmd.function =3D 1;
-		cmd.address =3D 0;
+		cmd.address =3D WILC_SDIO_F1_DATA_REG;
 	}
=20
 	size =3D ALIGN(size, 4);
@@ -598,8 +601,8 @@ static int wilc_sdio_init(struct wilc *wilc, bool resum=
e)
 	cmd.read_write =3D 1;
 	cmd.function =3D 0;
 	cmd.raw =3D 1;
-	cmd.address =3D 0x100;
-	cmd.data =3D 0x80;
+	cmd.address =3D SDIO_FBR_BASE(func->num);
+	cmd.data =3D SDIO_FBR_ENABLE_CSA;
 	ret =3D wilc_sdio_cmd52(wilc, &cmd);
 	if (ret) {
 		dev_err(&func->dev, "Fail cmd 52, enable csa...\n");
@@ -622,8 +625,8 @@ static int wilc_sdio_init(struct wilc *wilc, bool resum=
e)
 	cmd.read_write =3D 1;
 	cmd.function =3D 0;
 	cmd.raw =3D 1;
-	cmd.address =3D 0x2;
-	cmd.data =3D 0x2;
+	cmd.address =3D SDIO_CCCR_IOEx;
+	cmd.data =3D WILC_SDIO_CCCR_IO_EN_FUNC1;
 	ret =3D wilc_sdio_cmd52(wilc, &cmd);
 	if (ret) {
 		dev_err(&func->dev,
@@ -637,7 +640,7 @@ static int wilc_sdio_init(struct wilc *wilc, bool resum=
e)
 	cmd.read_write =3D 0;
 	cmd.function =3D 0;
 	cmd.raw =3D 0;
-	cmd.address =3D 0x3;
+	cmd.address =3D SDIO_CCCR_IORx;
 	loop =3D 3;
 	do {
 		cmd.data =3D 0;
@@ -647,7 +650,7 @@ static int wilc_sdio_init(struct wilc *wilc, bool resum=
e)
 				"Fail cmd 52, get IOR register...\n");
 			return ret;
 		}
-		if (cmd.data =3D=3D 0x2)
+		if (cmd.data =3D=3D WILC_SDIO_CCCR_IO_EN_FUNC1)
 			break;
 	} while (loop--);
=20
@@ -671,8 +674,8 @@ static int wilc_sdio_init(struct wilc *wilc, bool resum=
e)
 	cmd.read_write =3D 1;
 	cmd.function =3D 0;
 	cmd.raw =3D 1;
-	cmd.address =3D 0x4;
-	cmd.data =3D 0x3;
+	cmd.address =3D SDIO_CCCR_IENx;
+	cmd.data =3D WILC_SDIO_CCCR_IEN_MASTER | WILC_SDIO_CCCR_IEN_FUNC1;
 	ret =3D wilc_sdio_cmd52(wilc, &cmd);
 	if (ret) {
 		dev_err(&func->dev, "Fail cmd 52, set IEN register...\n");
@@ -711,12 +714,12 @@ static int wilc_sdio_read_size(struct wilc *wilc, u32=
 *size)
 	cmd.read_write =3D 0;
 	cmd.function =3D 0;
 	cmd.raw =3D 0;
-	cmd.address =3D 0xf2;
+	cmd.address =3D WILC_SDIO_INTERRUPT_DATA_SZ_REG;
 	cmd.data =3D 0;
 	wilc_sdio_cmd52(wilc, &cmd);
 	tmp =3D cmd.data;
=20
-	cmd.address =3D 0xf3;
+	cmd.address =3D WILC_SDIO_INTERRUPT_DATA_SZ_REG + 1;
 	cmd.data =3D 0;
 	wilc_sdio_cmd52(wilc, &cmd);
 	tmp |=3D (cmd.data << 8);
@@ -740,10 +743,10 @@ static int wilc_sdio_read_int(struct wilc *wilc, u32 =
*int_status)
 	 **/
 	if (!sdio_priv->irq_gpio) {
 		cmd.function =3D 1;
-		cmd.address =3D 0x04;
+		cmd.address =3D WILC_SDIO_EXT_IRQ_FLAG_REG;
 	} else {
 		cmd.function =3D 0;
-		cmd.address =3D 0xf7;
+		cmd.address =3D WILC_SDIO_IRQ_FLAG_REG;
 	}
 	cmd.raw =3D 0;
 	cmd.read_write =3D 0;
@@ -789,14 +792,14 @@ static int wilc_sdio_clear_int_ext(struct wilc *wilc,=
 u32 val)
 			cmd.read_write =3D 1;
 			cmd.function =3D 0;
 			cmd.raw =3D 0;
-			cmd.address =3D 0xf8;
+			cmd.address =3D WILC_SDIO_IRQ_CLEAR_FLAG_REG;
 			cmd.data =3D reg;
=20
 			ret =3D wilc_sdio_cmd52(wilc, &cmd);
 			if (ret) {
 				dev_err(&func->dev,
-					"Failed cmd52, set 0xf8 data (%d) ...\n",
-					__LINE__);
+					"Failed cmd52, set (%02x) data (%d) ...\n",
+					cmd.address, __LINE__);
 				return ret;
 			}
 		}
@@ -819,14 +822,14 @@ static int wilc_sdio_clear_int_ext(struct wilc *wilc,=
 u32 val)
 				cmd.read_write =3D 1;
 				cmd.function =3D 0;
 				cmd.raw =3D 0;
-				cmd.address =3D 0xf8;
+				cmd.address =3D WILC_SDIO_IRQ_CLEAR_FLAG_REG;
 				cmd.data =3D BIT(i);
=20
 				ret =3D wilc_sdio_cmd52(wilc, &cmd);
 				if (ret) {
 					dev_err(&func->dev,
-						"Failed cmd52, set 0xf8 data (%d) ...\n",
-						__LINE__);
+						"Failed cmd52, set (%02x) data (%d) ...\n",
+						cmd.address, __LINE__);
 					return ret;
 				}
 				flags &=3D ~BIT(i);
@@ -860,13 +863,13 @@ static int wilc_sdio_clear_int_ext(struct wilc *wilc,=
 u32 val)
 		cmd.read_write =3D 1;
 		cmd.function =3D 0;
 		cmd.raw =3D 0;
-		cmd.address =3D 0xf6;
+		cmd.address =3D WILC_SDIO_VMM_TBL_CTRL_REG;
 		cmd.data =3D vmm_ctl;
 		ret =3D wilc_sdio_cmd52(wilc, &cmd);
 		if (ret) {
 			dev_err(&func->dev,
-				"Failed cmd52, set 0xf6 data (%d) ...\n",
-				__LINE__);
+				"Failed cmd52, set (%02x) data (%d) ...\n",
+				cmd.address, __LINE__);
 			return ret;
 		}
 	}
diff --git a/drivers/staging/wilc1000/wlan.h b/drivers/staging/wilc1000/wla=
n.h
index 27f08b375345..ceec4801f18f 100644
--- a/drivers/staging/wilc1000/wlan.h
+++ b/drivers/staging/wilc1000/wlan.h
@@ -93,6 +93,42 @@
 #define WILC_SPI_PROTOCOL_OFFSET	(WILC_SPI_PROTOCOL_CONFIG - \
 					 WILC_SPI_REG_BASE)
=20
+/* Functions IO enables bits */
+#define WILC_SDIO_CCCR_IO_EN_FUNC1	BIT(1)
+
+/* Function/Interrupt enables bits */
+#define WILC_SDIO_CCCR_IEN_MASTER	BIT(0)
+#define WILC_SDIO_CCCR_IEN_FUNC1	BIT(1)
+
+/* Abort CCCR register bits */
+#define WILC_SDIO_CCCR_ABORT_RESET	BIT(3)
+
+/* Vendor specific CCCR registers */
+#define WILC_SDIO_WAKEUP_REG		0xf0
+#define WILC_SDIO_WAKEUP_BIT		BIT(0)
+
+#define WILC_SDIO_CLK_STATUS_REG	0xf1
+#define WILC_SDIO_CLK_STATUS_BIT	BIT(0)
+
+#define WILC_SDIO_INTERRUPT_DATA_SZ_REG	0xf2 /* Read size (2 bytes) */
+
+#define WILC_SDIO_VMM_TBL_CTRL_REG	0xf6
+#define WILC_SDIO_IRQ_FLAG_REG		0xf7
+#define WILC_SDIO_IRQ_CLEAR_FLAG_REG	0xf8
+
+#define WILC_SDIO_HOST_TO_FW_REG	0xfa
+#define WILC_SDIO_HOST_TO_FW_BIT	BIT(0)
+
+#define WILC_SDIO_FW_TO_HOST_REG	0xfc
+#define WILC_SDIO_FW_TO_HOST_BIT	BIT(0)
+
+/* Function 1 specific FBR register */
+#define WILC_SDIO_FBR_CSA_REG		0x10C /* CSA pointer (3 bytes) */
+#define WILC_SDIO_FBR_DATA_REG		0x10F
+
+#define WILC_SDIO_F1_DATA_REG		0x0
+#define WILC_SDIO_EXT_IRQ_FLAG_REG	0x4
+
 #define WILC_AHB_DATA_MEM_BASE		0x30000
 #define WILC_AHB_SHARE_MEM_BASE		0xd0000
=20
--=20
2.24.0