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From:   viktor.barna@celeno.com
To:     linux-wireless@vger.kernel.org
Cc:     Kalle Valo <kvalo@codeaurora.org>,
        "David S . Miller" <davem@davemloft.net>,
        Jakub Kicinski <kuba@kernel.org>,
        Aviad Brikman <aviad.brikman@celeno.com>,
        Eliav Farber <eliav.farber@gmail.com>,
        Oleksandr Savchenko <oleksandr.savchenko@celeno.com>,
        Shay Bar <shay.bar@celeno.com>,
        Viktor Barna <viktor.barna@celeno.com>
Subject: [RFC v1 155/256] cl8k: add reg/reg_lcu_common.h
Date:   Thu, 17 Jun 2021 16:00:42 +0000
Message-Id: <20210617160223.160998-156-viktor.barna@celeno.com>
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From: Viktor Barna <viktor.barna@celeno.com>

(Part of the split. Please, take a look at the cover letter for more
details).

Signed-off-by: Viktor Barna <viktor.barna@celeno.com>
---
 .../wireless/celeno/cl8k/reg/reg_lcu_common.h | 32 +++++++++++++++++++
 1 file changed, 32 insertions(+)
 create mode 100644 drivers/net/wireless/celeno/cl8k/reg/reg_lcu_common.h

diff --git a/drivers/net/wireless/celeno/cl8k/reg/reg_lcu_common.h b/driver=
s/net/wireless/celeno/cl8k/reg/reg_lcu_common.h
new file mode 100644
index 000000000000..0f4695b7f66f
--- /dev/null
+++ b/drivers/net/wireless/celeno/cl8k/reg/reg_lcu_common.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: MIT */
+/* Copyright(c) 2019-2021, Celeno Communications Ltd. */
+
+#ifndef REG_LCU_COMMON_H
+#define REG_LCU_COMMON_H
+
+#include <linux/types.h>
+#include "reg/reg_access.h"
+#include "chip.h"
+
+#define REG_LCU_COMMON_BASE_ADDR 0x007CF000
+
+/*
+ * @brief LCU_COMMON_SW_RST register definition
+ *  Software reset register description
+ * <pre>
+ *   Bits           Field Name   Reset Value
+ *  -----   ------------------   -----------
+ *    00    SW_RST                    0
+ * </pre>
+ */
+#define LCU_COMMON_SW_RST_ADDR        (REG_LCU_COMMON_BASE_ADDR + 0x000000=
48)
+#define LCU_COMMON_SW_RST_OFFSET      0x00000048
+#define LCU_COMMON_SW_RST_INDEX       0x00000012
+#define LCU_COMMON_SW_RST_RESET       0x00000000
+
+static inline void lcu_common_sw_rst_set(struct cl_chip *chip, u32 value)
+{
+       cl_reg_write_chip(chip, LCU_COMMON_SW_RST_ADDR, value);
+}
+
+#endif /* REG_LCU_COMMON_H */
--
2.30.0

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