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From:   Kalle Valo <kvalo@kernel.org>
To:     Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
Cc:     <ath11k@lists.infradead.org>, <linux-wireless@vger.kernel.org>,
        <devicetree@vger.kernel.org>, <robh@kernel.org>
Subject: Re: [PATCH v2 02/19] ath11k: Refactor PCI code to support hybrid bus devices
References: <1642337235-8618-1-git-send-email-quic_mpubbise@quicinc.com>
        <1642337235-8618-3-git-send-email-quic_mpubbise@quicinc.com>
Date:   Fri, 28 Jan 2022 14:13:55 +0200
In-Reply-To: <1642337235-8618-3-git-send-email-quic_mpubbise@quicinc.com>
        (Manikanta Pubbisetty's message of "Sun, 16 Jan 2022 18:16:58 +0530")
Message-ID: <87h79of470.fsf@kernel.org>
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Manikanta Pubbisetty <quic_mpubbise@quicinc.com> writes:

> Unlike other ATH11K PCIe devices which are enumerated by APSS
> processor (Application Processor SubSystem), WCN6750 gets
> enumerated by the WPSS Q6 processor (Wireless Processor SubSystem);
> In simple terms, though WCN6750 is PCIe device, it is not attached
> to the APSS processor, APSS will not know of such a device being
> present in the system and therefore WCN6750 will be registered as
> a platform device to the kernel core like other supported AHB
> devices.
>
> WCN6750 uses both AHB and PCI APIs for it's operation, it uses
> AHB APIs for device probe/boot and PCI APIs for device setup
> and register accesses; Because of this nature, it is referred
> as a hybrid bus device.
>
> Refactor PCI code to support hybrid bus devices like WCN6750.
>
> Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00573-QCAMSLSWPLZ-1
> Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
> Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
> Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
>
> Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>

[...]

> --- /dev/null
> +++ b/drivers/net/wireless/ath/ath11k/pci_cmn.c

[...]

> +static inline void ath11k_pci_select_window(struct ath11k_pci *ab_pci, u32 offset)
> +{
> +	struct ath11k_base *ab = ab_pci->ab;
> +
> +	u32 window = FIELD_GET(ATH11K_PCI_WINDOW_VALUE_MASK, offset);
> +
> +	lockdep_assert_held(&ab_pci->window_lock);
> +
> +	if (window != ab_pci->register_window) {
> +		iowrite32(ATH11K_PCI_WINDOW_ENABLE_BIT | window,
> +			  ab->mem + ATH11K_PCI_WINDOW_REG_ADDRESS);
> +		ioread32(ab->mem + ATH11K_PCI_WINDOW_REG_ADDRESS);
> +		ab_pci->register_window = window;
> +	}
> +}

So the style used in ath11k is ath11k_<filename>_foo, so that a function
ath11k_pci_foo() should be in pci.c. This patch is now breaking that
style. Maybe pci_cmn.c should renamed to cpci.c, pcic.c or something
like that? Then the function prefix could be ath11k_cpci_, ath11k_pcic_
or similar.

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