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Message-ID: <9acca69c-3d5d-b6b9-b5ca-c2411e206908@quicinc.com>
Date:   Mon, 21 Feb 2022 13:34:14 +0530
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Subject: Re: [PATCH v2 02/19] ath11k: Refactor PCI code to support hybrid bus
 devices
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To:     Kalle Valo <kvalo@kernel.org>
CC:     <ath11k@lists.infradead.org>, <linux-wireless@vger.kernel.org>,
        <devicetree@vger.kernel.org>, <robh@kernel.org>
References: <1642337235-8618-1-git-send-email-quic_mpubbise@quicinc.com>
 <1642337235-8618-3-git-send-email-quic_mpubbise@quicinc.com>
 <87h79of470.fsf@kernel.org>
From:   Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
In-Reply-To: <87h79of470.fsf@kernel.org>
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On 1/28/2022 5:43 PM, Kalle Valo wrote:
> Manikanta Pubbisetty <quic_mpubbise@quicinc.com> writes:
> 
>> Unlike other ATH11K PCIe devices which are enumerated by APSS
>> processor (Application Processor SubSystem), WCN6750 gets
>> enumerated by the WPSS Q6 processor (Wireless Processor SubSystem);
>> In simple terms, though WCN6750 is PCIe device, it is not attached
>> to the APSS processor, APSS will not know of such a device being
>> present in the system and therefore WCN6750 will be registered as
>> a platform device to the kernel core like other supported AHB
>> devices.
>>
>> WCN6750 uses both AHB and PCI APIs for it's operation, it uses
>> AHB APIs for device probe/boot and PCI APIs for device setup
>> and register accesses; Because of this nature, it is referred
>> as a hybrid bus device.
>>
>> Refactor PCI code to support hybrid bus devices like WCN6750.
>>
>> Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00573-QCAMSLSWPLZ-1
>> Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
>> Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
>> Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
>>
>> Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
> 
> [...]
> 
>> --- /dev/null
>> +++ b/drivers/net/wireless/ath/ath11k/pci_cmn.c
> 
> [...]
> 
>> +static inline void ath11k_pci_select_window(struct ath11k_pci *ab_pci, u32 offset)
>> +{
>> +	struct ath11k_base *ab = ab_pci->ab;
>> +
>> +	u32 window = FIELD_GET(ATH11K_PCI_WINDOW_VALUE_MASK, offset);
>> +
>> +	lockdep_assert_held(&ab_pci->window_lock);
>> +
>> +	if (window != ab_pci->register_window) {
>> +		iowrite32(ATH11K_PCI_WINDOW_ENABLE_BIT | window,
>> +			  ab->mem + ATH11K_PCI_WINDOW_REG_ADDRESS);
>> +		ioread32(ab->mem + ATH11K_PCI_WINDOW_REG_ADDRESS);
>> +		ab_pci->register_window = window;
>> +	}
>> +}
> 
> So the style used in ath11k is ath11k_<filename>_foo, so that a function
> ath11k_pci_foo() should be in pci.c. This patch is now breaking that
> style. Maybe pci_cmn.c should renamed to cpci.c, pcic.c or something
> like that? Then the function prefix could be ath11k_cpci_, ath11k_pcic_
> or similar.
> 

Makes sense, pcic.c and ath11k_pcic_* looks better, I'll make these changes.