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[2620:137:e000::1:18]) by mx.google.com with ESMTPS id x11-20020a63310b000000b00384b2898db2si88640pgx.434.2022.03.21.16.09.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Mar 2022 16:09:50 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-wireless-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) client-ip=2620:137:e000::1:18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=NCbWox8U; spf=pass (google.com: domain of linux-wireless-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) smtp.mailfrom=linux-wireless-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 0541E429642; Mon, 21 Mar 2022 15:08:04 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347804AbiCUNTt (ORCPT + 70 others); Mon, 21 Mar 2022 09:19:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53948 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234032AbiCUNTq (ORCPT ); Mon, 21 Mar 2022 09:19:46 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CCCF921E0B for ; Mon, 21 Mar 2022 06:18:18 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 69385611B9 for ; Mon, 21 Mar 2022 13:18:18 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 12768C340E8; Mon, 21 Mar 2022 13:18:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1647868697; bh=ftffsuXOcwkiieVfrAlyrUHaIDDIzRoaoNdHv5VLSLU=; h=Subject:From:In-Reply-To:References:To:Cc:Date:From; b=NCbWox8UHMMpiJX5vj+rqlLcVsXQHuCmsMtmpYyVeiHmDZwrkuLUy2mYAOk5b8Rb4 LesbXP0D3yMrX3Tetk2EX4Hc9RXQN8yFzYVOIMLgrzoImylvE0q7i3Rw0/Js/Blgwm T2m2riiTEX1H7yL23Y+iLIkYTHlmdgAJkBS3FRax0zKVpFlRuKOlEKtuTllDUdzD8+ OpKMs/R8PHsTZFl25LltCJNvaBykPWKdTxAS3QQ5HcxJgiVL4q6e3iQ/l65ctyVW/S ybZHFIL/aXHbsXjypYbDVGearb4FkTjcVBq3eDgvH1Ogu5PebiWbgfTGwO/0RE5W6k Ea1WpIU6aENGA== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: Re: [PATCH] ath11k: Advertise PLATFORM_CAP_PCIE_GLOBAL_RESET in qmi msg From: Kalle Valo In-Reply-To: <20211011055602.77342-1-bqiang@codeaurora.org> References: <20211011055602.77342-1-bqiang@codeaurora.org> To: Baochen Qiang Cc: ath11k@lists.infradead.org, linux-wireless@vger.kernel.org User-Agent: pwcli/0.1.0-git (https://github.com/kvalo/pwcli/) Python/3.7.3 Message-ID: <164786869187.26064.10113094982951147703.kvalo@kernel.org> Date: Mon, 21 Mar 2022 13:18:16 +0000 (UTC) X-Spam-Status: No, score=-3.5 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,MAILING_LIST_MULTI, RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org Baochen Qiang wrote: > Inform firmware that host is capable of triggering a global reset. > This is requested by firmware team. > > Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1 > > Signed-off-by: Baochen Qiang In the pending branch I fixed the trivial conflicts and enabled this feature on both wcn6855 hw2.0 and hw2.1. I also now have more information what this is about so changed the commit log to: --------------------------------------------------------------------- ath11k: enable PLATFORM_CAP_PCIE_GLOBAL_RESET QMI host capability In Qualcomm ARM platforms there is WL_EN pin and other power regulators which can be controlled at platform side to completely reset the chip. For most of x86 and other platforms, the chip is connected via PCIe M.2 interface, and there is no way to control WL_EN pin. Instead the host driver needs to reset the chip via PCIE_SOC_GLOBAL_RESET hardware register, just like ath11k does currently. But when using PCIE_SOC_GLOBAL_RESET there are some hardware registers which are not cleared/restored. To handle those cases we can enable PLATFORM_CAP_PCIE_GLOBAL_RESET QMI host capability to tell the firmware to do some platform specific operations after firmware download. This does not fix any known issues, but is recommended by the firmware team, so enable the capability on QCA6390 and WCN6855 PCI devices. It is currently unclear if this should be enabled also on QCN9074, so leave it disabled for now. On AHB devices this is not needed as they don't use PCIE_SOC_GLOBAL_RESET. --------------------------------------------------------------------- -- https://patchwork.kernel.org/project/linux-wireless/patch/20211011055602.77342-1-bqiang@codeaurora.org/ https://wireless.wiki.kernel.org/en/developers/documentation/submittingpatches