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Miller" , Jakub Kicinski , "Paolo Abeni" , Olha Cherevyk , iommu , linux-wireless , Netdev , "Linux Kernel Mailing List" , Greg Kroah-Hartman , stable Subject: RE: [REGRESSION] Recent swiotlb DMA_FROM_DEVICE fixes break ath9k-based AP Thread-Topic: [REGRESSION] Recent swiotlb DMA_FROM_DEVICE fixes break ath9k-based AP Thread-Index: AQHYQm5IK/9JYQDqEEKfLChLw6SC36zUb2Ng Date: Mon, 28 Mar 2022 08:15:29 +0000 Message-ID: References: <1812355.tdWV9SEqCh@natalenko.name> <27b5a287-7a33-9a8b-ad6d-04746735fb0c@arm.com> <20220324190216.0efa067f.pasic@linux.ibm.com> <20220325163204.GB16426@lst.de> <87y20x7vaz.fsf@toke.dk> <20220328063723.GA29405@lst.de> In-Reply-To: <20220328063723.GA29405@lst.de> Accept-Language: en-GB, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.202.205.107] MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=C51A453 smtp.mailfrom=david.laight@aculab.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: aculab.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-Spam-Status: No, score=-3.6 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H5,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org From: Christoph Hellwig > Sent: 28 March 2022 07:37 > > On Fri, Mar 25, 2022 at 11:46:09AM -0700, Linus Torvalds wrote: > > I think my list of three different sync cases (not just two! It's not > > just about whether to sync for the CPU or the device, it's also about > > what direction the data itself is taking) is correct. > > > > But maybe I'm wrong. > > At the high level you are correct. It is all about which direction > the data is taking. That is the direction argument that all the > map/unmap/sync call take. The sync calls then just toggle the ownership. > You seem to hate that ownership concept, but I don't see how things > could work without that ownership concept as we're going to be in > trouble without having that. And yes, a peek operation could work in > some cases, but it would have to be at the cache line granularity. I don't think it is really 'ownership' but more about who has write access. Only one side can have write access (to a cache line [1]) at any one time. Read access is different. You need a 'synchronise' action to pick up newly written data. This might be a data copy, cache flush or cache invalidate. It only need affect the area that needs to be read - not full buffer. Partial cache flush/invalidate will almost certainly speed up receipt of short network packets that are copied into a new skb - leaving the old one mapped for another receive. [1] The cache line size might be a property of the device and dma subsystem, not just the cpu. I have used hardware when the effective size was 1kB. David - Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK Registration No: 1397386 (Wales)