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From:   Kalle Valo <kvalo@kernel.org>
To:     Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
Cc:     <ath11k@lists.infradead.org>, <linux-wireless@vger.kernel.org>,
        <devicetree@vger.kernel.org>, <robh@kernel.org>, <mka@chromium.org>
Subject: Re: [PATCH v4 04/12] ath11k: Add register access logic for WCN6750
References: <20220406094107.17878-1-quic_mpubbise@quicinc.com>
        <20220406094107.17878-5-quic_mpubbise@quicinc.com>
        <87czh3gjuq.fsf@kernel.org>
        <2a18a4d3-254b-727e-e96d-90deec61571c@quicinc.com>
Date:   Fri, 29 Apr 2022 11:57:32 +0300
In-Reply-To: <2a18a4d3-254b-727e-e96d-90deec61571c@quicinc.com> (Manikanta
        Pubbisetty's message of "Wed, 27 Apr 2022 11:23:52 +0530")
Message-ID: <87levoe077.fsf@kernel.org>
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Manikanta Pubbisetty <quic_mpubbise@quicinc.com> writes:

> On 4/27/2022 11:15 AM, Kalle Valo wrote:
>> Manikanta Pubbisetty <quic_mpubbise@quicinc.com> writes:
>>
>>> WCN6750 uses static window mapping to access the HW registers.
>>> Unlike QCN9074 which uses 2nd window for CE and 3rd window
>>> for UMAC register accesses, WCN6750 uses 1st window for UMAC
>>> and 2nd window for CE registers.
>>>
>>> Code is refactored so that WCN6750 can use the existing
>>> ath11k_pci_read/write() APIs for accessing the registers.
>>>
>>> Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00573-QCAMSLSWPLZ-1
>>> Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
>>> Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
>>> Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
>>>
>>> Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
>>> ---
>>>   drivers/net/wireless/ath/ath11k/ahb.c  |  3 ++
>>>   drivers/net/wireless/ath/ath11k/core.h |  2 +
>>>   drivers/net/wireless/ath/ath11k/pci.c  |  4 ++
>>>   drivers/net/wireless/ath/ath11k/pcic.c | 53 +++++++++-----------------
>>>   4 files changed, 28 insertions(+), 34 deletions(-)
>>>
>>> diff --git a/drivers/net/wireless/ath/ath11k/ahb.c b/drivers/net/wireless/ath/ath11k/ahb.c
>>> index d73643e3e8dd..d27fc7276977 100644
>>> --- a/drivers/net/wireless/ath/ath11k/ahb.c
>>> +++ b/drivers/net/wireless/ath/ath11k/ahb.c
>>> @@ -42,6 +42,9 @@ const struct ath11k_bus_params ath11k_ahb_hybrid_bus_params = {
>>>   	.fixed_bdf_addr = false,
>>>   	.fixed_mem_region = false,
>>>   	.hybrid_bus_type = true,
>>> +	.static_window_map = true,
>>> +	.dp_window_idx = 1,
>>> +	.ce_window_idx = 2,
>>>   };
>>
>> Even if the values are zero, please initialise the new fields in every
>> bus_params structure:
>>
>> ahb.c:31:static const struct ath11k_bus_params ath11k_ahb_bus_params = {
>> pci.c:118:static const struct ath11k_bus_params ath11k_pci_bus_params = {
>>
>
> Makes sense, should I send another series addressing these?

Please fix that already in this patchset.

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