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Message-ID: <c1c3472427080716c69ad99ebe5d1954db44f03f.camel@freebox.fr>
Subject: Re: [PATCH v7 4/9] ath11k: Add register access logic for WCN6750
From:   Maxime Bizon <mbizon@freebox.fr>
Reply-To: mbizon@freebox.fr
To:     Manikanta Pubbisetty <quic_mpubbise@quicinc.com>,
        ath11k@lists.infradead.org
Cc:     linux-wireless@vger.kernel.org, devicetree@vger.kernel.org,
        robh@kernel.org, mka@chromium.org
Date:   Mon, 30 May 2022 16:19:06 +0200
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         <20220429170502.20080-5-quic_mpubbise@quicinc.com>
         <bd6d97a4cc6665d0ee632444f75e3480160387ec.camel@freebox.fr>
         <c57e8791-b6ce-0752-52ca-a1cb938187d7@quicinc.com>
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On Thu, 2022-05-26 at 09:12 +0530, Manikanta Pubbisetty wrote:

> 
> Thanks for letting me know about this, IIRC I don't remember 
> encountering this problem in my testing. Just for my understanding,
> have you reverted this change and confirmed that these errors go away
> ?

I first confirmed the register location was indeed incorrect, then I
fixed it like this:

--- a/drivers/net/wireless/ath/ath11k/pcic.c
+++ b/drivers/net/wireless/ath/ath11k/pcic.c
@@ -143,7 +143,7 @@ EXPORT_SYMBOL(ath11k_pcic_init_msi_config);
 static inline u32 ath11k_pcic_get_window_start(struct ath11k_base *ab,
 					       u32 offset)
 {
-	u32 window_start = 0;
+	u32 window_start = ATH11K_PCI_WINDOW_START;
 
 	if ((offset ^ HAL_SEQ_WCSS_UMAC_OFFSET) < ATH11K_PCI_WINDOW_RANGE_MASK)
 		window_start = ab->hw_params.dp_window_idx * ATH11K_PCI_WINDOW_START;
@@ -170,8 +170,12 @@ void ath11k_pcic_write32(struct ath11k_base *ab, u32 offset, u32 value)
 		iowrite32(value, ab->mem  + offset);
 	} else if (ab->hw_params.static_window_map) {
 		window_start = ath11k_pcic_get_window_start(ab, offset);
-		iowrite32(value, ab->mem + window_start +
-			  (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
+		if (window_start == ATH11K_PCI_WINDOW_START &&
+                    ab->pci.ops->window_write32)
+			ab->pci.ops->window_write32(ab, offset, value);
+		else
+			iowrite32(value, ab->mem + window_start +
+				  (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
 	} else if (ab->pci.ops->window_write32) {
 		ab->pci.ops->window_write32(ab, offset, value);
 	}
@@ -200,8 +204,12 @@ u32 ath11k_pcic_read32(struct ath11k_base *ab, u32 offset)
 		val = ioread32(ab->mem + offset);
 	} else if (ab->hw_params.static_window_map) {
 		window_start = ath11k_pcic_get_window_start(ab, offset);
-		val = ioread32(ab->mem + window_start +
-			       (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
+		if (window_start == ATH11K_PCI_WINDOW_START &&
+		    ab->pci.ops->window_read32)
+			val = ab->pci.ops->window_read32(ab, offset);
+		else
+			val = ioread32(ab->mem + window_start +
+				       (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
 	} else if (ab->pci.ops->window_read32) {
 		val = ab->pci.ops->window_read32(ab, offset);
 	}

-- 
Maxime