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From:   Kalle Valo <kvalo@kernel.org>
To:     Baochen Qiang <quic_bqiang@quicinc.com>
Cc:     <ath11k@lists.infradead.org>, <linux-wireless@vger.kernel.org>
Subject: Re: [PATCH v2 1/2] wifi: ath11k: Split PCI write/read functions
References: <20220802075533.1744-1-quic_bqiang@quicinc.com>
        <20220802075533.1744-2-quic_bqiang@quicinc.com>
Date:   Fri, 09 Sep 2022 13:42:45 +0300
In-Reply-To: <20220802075533.1744-2-quic_bqiang@quicinc.com> (Baochen Qiang's
        message of "Tue, 2 Aug 2022 15:55:32 +0800")
Message-ID: <87k06c96ca.fsf@kernel.org>
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Baochen Qiang <quic_bqiang@quicinc.com> writes:

> ath11k_pcic_write32/read32 tries to do wake up before doing actual
> write/read work, which means each time a u32 is written/read, wake
> up is performed. This is not necessary in case where we do a
> large amount of write/read, because only one time of wake up is needed.
> So split each one into two parts, the first part does wake up and
> release, and the second one does actual write/read work.
>
> Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1
> Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
>
> Signed-off-by: Baochen Qiang <quic_bqiang@quicinc.com>
> ---
> v2:
>   1: rebased on latest ath.git
>
>  drivers/net/wireless/ath/ath11k/pcic.c | 50 ++++++++++++++++----------
>  1 file changed, 32 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/net/wireless/ath/ath11k/pcic.c b/drivers/net/wireless/ath/ath11k/pcic.c
> index 1adf20ebef27..15ca069e501f 100644
> --- a/drivers/net/wireless/ath/ath11k/pcic.c
> +++ b/drivers/net/wireless/ath/ath11k/pcic.c
> @@ -140,49 +140,63 @@ int ath11k_pcic_init_msi_config(struct ath11k_base *ab)
>  }
>  EXPORT_SYMBOL(ath11k_pcic_init_msi_config);
>  
> +static void ath11k_pcic_do_write32(struct ath11k_base *ab, u32 offset, u32 value)

In the pending branch I renamed this __ath11k_pcic_write32(). I find
that more readable than using the word "do" in the middle.

> +static u32 ath11k_pcic_do_read32(struct ath11k_base *ab, u32 offset)

And this to __ath11k_pcic_do_read32().

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