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Date:   Sun, 30 Apr 2023 15:26:07 +0300
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Subject: Re: [PATCH] wifi: rtl8xxxu: Support new chip RTL8192FU
To:     Ping-Ke Shih <pkshih@realtek.com>,
        "linux-wireless@vger.kernel.org" <linux-wireless@vger.kernel.org>
Cc:     Jes Sorensen <Jes.Sorensen@gmail.com>
References: <90102fa5-5065-9598-d21f-3624629a0cb5@gmail.com>
 <867b2c35f606434bb82ecc17d0fd9336@realtek.com>
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From:   Bitterblue Smith <rtl8821cerfe2@gmail.com>
In-Reply-To: <867b2c35f606434bb82ecc17d0fd9336@realtek.com>
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On 28/04/2023 09:21, Ping-Ke Shih wrote:
> 
> 
>> -----Original Message-----
>> From: Bitterblue Smith <rtl8821cerfe2@gmail.com>
>> Sent: Wednesday, April 26, 2023 1:28 AM
>> To: linux-wireless@vger.kernel.org
>> Cc: Jes Sorensen <Jes.Sorensen@gmail.com>; Ping-Ke Shih <pkshih@realtek.com>
>> Subject: [PATCH] wifi: rtl8xxxu: Support new chip RTL8192FU
>>
>> This is a newer chip, similar to the RTL8710BU in that it uses the same
>> PHY status structs.
>>
>> Features: 2.4 GHz, b/g/n mode, 2T2R, 300 Mbps.
>>
>> It can allegedly have Bluetooth, but that's not implemented here.
>>
>> This chip can have many RFE (RF front end) types, of which type 5 is
>> the only one tested. Many of the other types need different
>> initialisation tables. They can be added if someone wants them.
>>
>> The vendor driver v5.8.6.2_35538.20191028_COEX20190910-0d02 from
>> https://github.com/BrightX/rtl8192fu was used as reference.
>>
>> Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com>
>> ---
>>  drivers/net/wireless/realtek/rtl8xxxu/Kconfig |    3 +-
>>  .../net/wireless/realtek/rtl8xxxu/rtl8xxxu.h  |   47 +
>>  .../realtek/rtl8xxxu/rtl8xxxu_8188f.c         |    3 +-
>>  .../realtek/rtl8xxxu/rtl8xxxu_8192f.c         | 2081 +++++++++++++++++
>>  .../realtek/rtl8xxxu/rtl8xxxu_8710b.c         |    1 +
>>  .../realtek/rtl8xxxu/rtl8xxxu_8723b.c         |    1 +
>>  .../wireless/realtek/rtl8xxxu/rtl8xxxu_core.c |  104 +-
>>  .../wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h |   15 +
>>  8 files changed, 2225 insertions(+), 30 deletions(-)
>>  create mode 100644 drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192f.c
>>
> 
> [...]
> 
>> +static void rtl8192fu_config_kfree(struct rtl8xxxu_priv *priv, u8 channel)
>> +{
>> +       u8 bb_gain[3] = { EFUSE_UNDEFINED, EFUSE_UNDEFINED, EFUSE_UNDEFINED };
>> +       u8 bb_gain_path_mask[2] = { 0x0f, 0xf0 };
>> +       enum rtl8xxxu_rfpath rfpath;
>> +       u8 bb_gain_for_path;
>> +       u8 channel_idx;
>> +
>> +       if (channel >= 1 && channel <= 3)
>> +               channel_idx = 0;
>> +       if (channel >= 4 && channel <= 9)
>> +               channel_idx = 1;
>> +       if (channel >= 10 && channel <= 14)
>> +               channel_idx = 2;
>> +
>> +       rtl8xxxu_read_efuse8(priv, 0x1ee, &bb_gain[1]);
>> +       rtl8xxxu_read_efuse8(priv, 0x1ec, &bb_gain[0]);
>> +       rtl8xxxu_read_efuse8(priv, 0x1ea, &bb_gain[2]);
> 
> Can you define these fields in struct rtl8192fu_efuse, and access via
> the struct? 
> 
> 
>> +
>> +       if (bb_gain[1] == EFUSE_UNDEFINED)
>> +               return;
>> +
>> +       if (bb_gain[0] == EFUSE_UNDEFINED)
>> +               bb_gain[0] = bb_gain[1];
>> +
>> +       if (bb_gain[2] == EFUSE_UNDEFINED)
>> +               bb_gain[2] = bb_gain[1];
>> +
>> +       for (rfpath = RF_A; rfpath < priv->rf_paths; rfpath++) {
>> +               /* power_trim based on 55[19:14] */
>> +               rtl8xxxu_write_rfreg_mask(priv, rfpath, RF6052_REG_UNKNOWN_55,
>> +                                         BIT(5), 1);
>> +
>> +               /* enable 55[14] for 0.5db step */
>> +               rtl8xxxu_write_rfreg_mask(priv, rfpath, 0xf5, BIT(18), 1);
> 
> #define RF6052_REG_GAIN_CTRL 0x55
> 

Just to be sure, this is the name for 0x55 or 0xf5 ?