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Mon, 10 Jul 2023 03:39:40 -0500 From: Evan Quan To: , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , Evan Quan , Mario Limonciello Subject: [PATCH V6 7/9] drm/amd/pm: add flood detection for wbrf events Date: Mon, 10 Jul 2023 16:36:39 +0800 Message-ID: <20230710083641.2132264-8-evan.quan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230710083641.2132264-1-evan.quan@amd.com> References: <20230710083641.2132264-1-evan.quan@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT030:EE_|SA3PR12MB9089:EE_ X-MS-Office365-Filtering-Correlation-Id: eb4a24ca-74b1-430c-fbe8-08db81213d20 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: aovI53qDsRjfPqIwVmaXjH7pFmB+DGqeXhcXfxjsnl2wCAwIcahw+/0cfPHTjHZTLYG/23JS+b552XnzbxzPUOwMDjnGl89nHRQ5UxHAPpRU0bmC0m+iTJvqPyM0zYoLwdaga3jlh+Tq+XrU5xZhMlCQ66NRJIF4Q6b6JoLrFavcfvjIhrmt1E8eT5I0eNrOirL4sUPMIwwLuxK+dWi8HvyM3yXIF5c52YTKpv+2BjZ16tgH3kcFoHUgsGGmkIHO3Mcwib5HOtnzNk12Tx1xmpjtvhpxkTXoNnrq19e5lpO6wU4lx1bvzXwNRWNfKfWBAN1ymn9tsu9dsBjDs2vUN8JSM9iPkONoK4KqN07MmsJyIkLvNyfUcyRKai6yg2nWQiQ3+HFVOzXDJz4wsY0hPZl2sYSu6ONgBh1vZpMoXJKlnlSjAmXQos11U1wDzWvOzU75EkLtyI8bu+kUDFFI9rCczOwULHELCI8s3Z/fVhm4qhh9C2RhIXzD6PBQZIyK3SiRSrnbsGaFKw5TalnavjVw/WBNHS1Gzp2W9Camu2de1fol05HxCgAvoCmXbHdoI04fwU6ahl5KCAS6IVfnzdfwLtUYVCEwyfeYtEMkfWq2wwiQDulHLFSVVkwLmagpceYUV4Nm9LimRguwcrYB9Mpb7QgeKbQnBh0ll1OtRkm7oXFKCSVA92DdiRv7C/lD/3excMFG+mSQMZI7vDAR0edL6/Hg+3zotZ31h9dqcAPGdIh3fq0l6yMFKdA8rvHsUFWl5dO/9BpuhflQu6OzzPoqz5Wyyli+XPvlEEihnMjJPmxWAtyEjzc0LnoF4/IwKsEAABVZJAMK09ZYf/irHg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(39860400002)(376002)(136003)(346002)(396003)(451199021)(36840700001)(40470700004)(46966006)(40460700003)(186003)(16526019)(26005)(2616005)(1076003)(36860700001)(336012)(426003)(83380400001)(47076005)(41300700001)(4326008)(2906002)(316002)(44832011)(7416002)(5660300002)(8676002)(8936002)(478600001)(7696005)(70586007)(70206006)(110136005)(54906003)(40480700001)(36756003)(921005)(81166007)(356005)(82740400003)(86362001)(82310400005)(83996005)(2101003)(36900700001);DIR:OUT;SFP:1101; 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Signed-off-by: Evan Quan Reviewed-by: Mario Limonciello --- drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 31 +++++++++++++++---- drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 7 +++++ 2 files changed, 32 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c index 83d428e890df..aa7faeafc86b 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c @@ -1278,7 +1278,8 @@ static int smu_wbrf_event_handler(struct notifier_block *nb, switch (action) { case WBRF_CHANGED: - smu_wbrf_handle_exclusion_ranges(smu); + schedule_delayed_work(&smu->wbrf_delayed_work, + msecs_to_jiffies(SMU_WBRF_EVENT_HANDLING_PACE)); break; default: return NOTIFY_DONE; @@ -1287,6 +1288,21 @@ static int smu_wbrf_event_handler(struct notifier_block *nb, return NOTIFY_OK; } +/** + * smu_wbrf_delayed_work_handler - callback on delayed work timer expired + * + * @work: struct work_struct pointer + * + * Flood is over and driver will consume the latest exclusion ranges. + */ +static void smu_wbrf_delayed_work_handler(struct work_struct *work) +{ + struct smu_context *smu = + container_of(work, struct smu_context, wbrf_delayed_work.work); + + smu_wbrf_handle_exclusion_ranges(smu); +} + /** * smu_wbrf_support_check - check wbrf support * @@ -1317,12 +1333,14 @@ static void smu_wbrf_support_check(struct smu_context *smu) */ static int smu_wbrf_init(struct smu_context *smu) { - struct amdgpu_device *adev = smu->adev; int ret; if (!smu->wbrf_supported) return 0; + INIT_DELAYED_WORK(&smu->wbrf_delayed_work, + smu_wbrf_delayed_work_handler); + smu->wbrf_notifier.notifier_call = smu_wbrf_event_handler; ret = wbrf_register_notifier(&smu->wbrf_notifier); if (ret) @@ -1333,11 +1351,10 @@ static int smu_wbrf_init(struct smu_context *smu) * before our driver loaded. To make sure our driver * is awared of those exclusion ranges. */ - ret = smu_wbrf_handle_exclusion_ranges(smu); - if (ret) - dev_err(adev->dev, "Failed to handle wbrf exclusion ranges\n"); + schedule_delayed_work(&smu->wbrf_delayed_work, + msecs_to_jiffies(SMU_WBRF_EVENT_HANDLING_PACE)); - return ret; + return 0; } /** @@ -1353,6 +1370,8 @@ static void smu_wbrf_fini(struct smu_context *smu) return; wbrf_unregister_notifier(&smu->wbrf_notifier); + + cancel_delayed_work_sync(&smu->wbrf_delayed_work); } static int smu_smc_hw_setup(struct smu_context *smu) diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h index 5b2343cfc69b..5df28d4a8c30 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h @@ -480,6 +480,12 @@ struct stb_context { #define WORKLOAD_POLICY_MAX 7 +/* + * Configure wbrf event handling pace as there can be only one + * event processed every SMU_WBRF_EVENT_HANDLING_PACE ms. + */ +#define SMU_WBRF_EVENT_HANDLING_PACE 10 + struct smu_context { struct amdgpu_device *adev; @@ -579,6 +585,7 @@ struct smu_context /* data structures for wbrf feature support */ bool wbrf_supported; struct notifier_block wbrf_notifier; + struct delayed_work wbrf_delayed_work; }; struct i2c_adapter; -- 2.34.1