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Tue, 21 Nov 2023 16:07:49 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3ALG7nQj029540 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 21 Nov 2023 16:07:49 GMT Received: from [10.110.116.223] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Tue, 21 Nov 2023 08:07:48 -0800 Message-ID: <1796b817-797e-4673-bfee-2f55352c37be@quicinc.com> Date: Tue, 21 Nov 2023 08:07:48 -0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 5/7] wifi: ath12k: add support one MSI vector Content-Language: en-US To: Kang Yang , CC: References: <20231121021304.12966-1-quic_kangyang@quicinc.com> <20231121021304.12966-6-quic_kangyang@quicinc.com> From: Jeff Johnson In-Reply-To: <20231121021304.12966-6-quic_kangyang@quicinc.com> Content-Type: text/plain; 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Tue, 21 Nov 2023 08:07:55 -0800 (PST) On 11/20/2023 6:13 PM, Kang Yang wrote: > On some platforms it's not possible to allocate 32 MSI vectors for > various reasons, maybe kernel configuration, VT-d disabled, buggy BIOS > etc. So ath12k was not able to use WCN7850 PCI devices on those > platforms. Add support for one MSI vector to solve that. > > In case of one MSI vector, interrupt migration needs to be disabled. > This is because when interrupt migration happens, the msi_data may > change. However, msi_data is already programmed to rings during initial > phase and ath12k has no way to know that msi_data is changed during run > time and reprogram again. > > In case of one MSI vector, MHI subsystem should not use IRQF_NO_SUSPEND > as WCN7850 doesn't set this flag too. Ath12k doesn't need to leave IRQ > enabled in suspend state. > > Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.0-03427-QCAHMTSWPL_V1.0_V2.0_SILICONZ-1.15378.4 > > Signed-off-by: Kang Yang Acked-by: Jeff Johnson