Received: by 2002:a05:7412:8d10:b0:f3:1519:9f41 with SMTP id bj16csp3864439rdb; Mon, 11 Dec 2023 02:08:23 -0800 (PST) X-Google-Smtp-Source: AGHT+IHaO0gzt53pVwYB+CskWvuxRsEu0lnqNncnYxVxwSfCvUobENle4s44PuKpKnZd9N0yxKO8 X-Received: by 2002:a17:907:7fa0:b0:a1b:619e:53f9 with SMTP id qk32-20020a1709077fa000b00a1b619e53f9mr1126397ejc.221.1702289303557; Mon, 11 Dec 2023 02:08:23 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1702289303; cv=pass; d=google.com; s=arc-20160816; b=jYCRPV66nQwaPmg4C7PxT2Ms0cUFig/R52iXJufWn0p/9ajYUBBDjFoW0YZD8wn/6p 95dGAgUrBqcyA59/x1Gu39D8VLcy7kNgnNbXFEOLazTlyYVOjH5veB4wtSUR9z7wVsbk PeS1RPEmOhnSgFXJaKciGUZSuIPY4LPrkcwEf2OLqrAcclax0N9yPZB1UqzKC9I3zSv+ +NYmXl3Wfp7QiDXOfp4MYTz931xb1e5PvWAhO5ZEZsrzoHVTbTp/EQpdoKn7TSucjqSf BJi8Ulr60+kHHY/SR5PIxi+a0xWAylCACNMUP/LyZLed2Z6uCjbkfzXGL/Cw23H+uoTS V5pA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=R1JydqCe69/rHv3/TqUqpijvwhn95PfTcCDHWLKbcPs=; fh=lEi7TWq7sMNvk3IAe55wFeCBsfaZRx5ZDKS29bJlqjY=; b=ZhWZxhEHH1H8h9vatrzYq0eflKj63jzGQaILxgobScjRCOYKhrDVHW+Jz3PqnsOKDn KQTZ4IaITW9joPKH8mg1DukwGvSZnlxGmopshDkDQbxNvzdQXjZV/2cgREIFJ3lET6VE MUbbFWVyMH3F3AxWWotm2b1/u+lnBJfMlMTXHAlxO6LTfANO3BOqW8JlhkZhctSIWdVN 8S21evOpdy5ODjo6G5ER2QcnQHVH0zgTGW5ywwKeQEXqqds+JQ/nWk1JmyA4R5FOAk4n 3TP5ZwPJ+DR9mdTukdCAGtzXC1L2SvgeEvSJOjDxXNEx4WnGcxuwuaA1L2TN/E2cY8pU G5gg== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=duqoKFMw; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-wireless+bounces-648-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-wireless+bounces-648-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Return-Path: Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. [2604:1380:4601:e00::3]) by mx.google.com with ESMTPS id l19-20020a170906079300b00a1c97960553si3541953ejc.255.2023.12.11.02.08.23 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Dec 2023 02:08:23 -0800 (PST) Received-SPF: pass (google.com: domain of linux-wireless+bounces-648-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) client-ip=2604:1380:4601:e00::3; Authentication-Results: mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=duqoKFMw; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-wireless+bounces-648-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-wireless+bounces-648-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 1B3821F2149A for ; Mon, 11 Dec 2023 10:08:23 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id EC8D42209D; Mon, 11 Dec 2023 10:07:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="duqoKFMw" X-Original-To: linux-wireless@vger.kernel.org Received: from NAM12-MW2-obe.outbound.protection.outlook.com (mail-mw2nam12on2077.outbound.protection.outlook.com [40.107.244.77]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 17183F4; Mon, 11 Dec 2023 02:07:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=mbTWwrODYts0juW8jFQFGpn9yJaQp+Xdnbdu1r+ozh8jYv6n454umTIgL90Ts2UL5+7OWqXblBGAUfnDCmhWt1YJA3EIWh3TLMMB1os91FXvGkGgG2LRtX+hkt6VcX4oKIxHKSd2qieHtk88zR2g6FMmwyCVVAmxZOw47C8ca/98l80zGHBNPrFU4QC79cE95v+uFI4V4AqSy9cW2+EWph8bEZJ8gbbC39AQU2sFQEH/Gg8ZJow1BxttgnxQhYS8GSfntjbeSdLM98H8MSjRxzD0huOXrVXNuhHYAzaJuktqlupL9JN4KmimOkLUgbqTVdqYGtE8OozogHFAg+/PlA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=R1JydqCe69/rHv3/TqUqpijvwhn95PfTcCDHWLKbcPs=; b=fpaDtUJVGfewgQ3/+2P0mUEpmx+GC+KcJ7XDlD6nqpn8DXlOTvl98p3mvMIS1DIMfmuFXPtJNNZwaYSVYf6N71FHVZTJDB3qAMujO6WyWNMzZlgQcpvThjcTOOWuIh24guVqVTEhSIZJ6KHXlACir6scFqqJWJikAEKs9uBdPXHAzyvfcHRN/VlMV8hMKIBy3Xo3tfmXG4sZmlKFstVaUVxvwtvpBMoygPxG8+SB2eQvxxK6CONX9G9Sp5RVgfQPIxMEuIsFt1liRNGkC77U79R9kG0ofEUXTj//gb4WIdJqkmWvfjDIhjsTl8tQGCyCrXzFPTMQdJ75N045yen5Rg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=lists.freedesktop.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=R1JydqCe69/rHv3/TqUqpijvwhn95PfTcCDHWLKbcPs=; b=duqoKFMw4zW2JxNneVLscgVJQNESi/8qwD9eHmW+/9AsW5d27Em5J63vWgihhUX6B+gBXi2TIAtL+mNLXvE8uVt5Dl9FAVVVnaJB6k+aRFSCME2H1hIgqLLuoOJPEM1SHeju0sagWhjMS+J4U+bjekendnCGLD08IM2gUdAl2Q8= Received: from CH2PR20CA0020.namprd20.prod.outlook.com (2603:10b6:610:58::30) by DS7PR12MB6008.namprd12.prod.outlook.com (2603:10b6:8:7f::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7068.32; Mon, 11 Dec 2023 10:07:36 +0000 Received: from CO1PEPF000044FB.namprd21.prod.outlook.com (2603:10b6:610:58:cafe::83) by CH2PR20CA0020.outlook.office365.com (2603:10b6:610:58::30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7068.29 via Frontend Transport; Mon, 11 Dec 2023 10:07:35 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CO1PEPF000044FB.mail.protection.outlook.com (10.167.241.201) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7113.2 via Frontend Transport; Mon, 11 Dec 2023 10:07:35 +0000 Received: from compile-server.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.34; Mon, 11 Dec 2023 04:07:30 -0600 From: Ma Jun To: , , , , , , , , , , , , , , , CC: , Evan Quan , Ma Jun Subject: [PATCH v16 6/9] drm/amd/pm: setup the framework to support Wifi RFI mitigation feature Date: Mon, 11 Dec 2023 18:06:27 +0800 Message-ID: <20231211100630.2170152-7-Jun.Ma2@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231211100630.2170152-1-Jun.Ma2@amd.com> References: <20231211100630.2170152-1-Jun.Ma2@amd.com> Precedence: bulk X-Mailing-List: linux-wireless@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044FB:EE_|DS7PR12MB6008:EE_ X-MS-Office365-Filtering-Correlation-Id: 379a84bd-84c5-4703-388f-08dbfa30ff98 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: yvcMwp9mNjh7W1ViD+ZNTKCQmk8UzEq+FBxOiv//ytW4YC3h0d93jnIxARniwB8IjKJw+pV/pVMLy0Ciq/dIa66jpKLmdXryi3uHhHPtTd/5u4mj5+hHo5ci3rylZW/V9HUPBTEZCUNJSREd8AiT4MTHS1DfBRFCh964w/DvYRpNeJC1h4nl8z9Lh17RlJ4tqNFsRYuG2S5mk7Y3W1HMqZF2092Ht07eCS11zAJAjSP7JRBDjj5M6rSsQMG+qNtp7MQlVtDQCwVUeO6eA01LH7s/pSn++FWYLNswAyzPQ6BgZ0AJNZMZIYjLzXShYaVUu5pKJNpV5bhrwATzzl9zMqSzKgZCyr9DDGHSrldmgBkRZMfjF840ooJkvSgPXB9Qy70p4z3S5vJ0roR4cjlK599XXQinOnJAIlbxt2rv/8bPbxpkAJY6lxx8HobKtg49OTvTuFiLuDZ4f1bhHtPr0bdFW7xbAXOJ/1Lr69HzBIgWYPcxumfKj83oiTUWXhxNaCyYJzN33xenfBl5XWhFkvEYadSA/UvETBYLBgXiAVE/sSJH6EdyzA0EqVgBexLFcB14yS6ow1b4zKiwDHSiDet+EF8YQbT4US0clTGYu5YULDotX9BagjSzrheO0YYdcFeDDMNT8n9HbsdgfgqQl8lWukdfws7XTfUkdzX246P778g6f/UC3/eDIqQU17+79+LhE+MKa0HziAMAlPKCv8uqbeDL6Y4j00vgXOuqhllmYyi/yPtVlwbeJiqOwQDZTyFhmj7wsNvq9m7r3OHwFLn9ZoSPJFrRAszIyrRlrnQ= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(136003)(39860400002)(376002)(346002)(396003)(230922051799003)(64100799003)(451199024)(186009)(82310400011)(1800799012)(36840700001)(40470700004)(32650700002)(36860700001)(336012)(426003)(356005)(83380400001)(82740400003)(81166007)(86362001)(41300700001)(5660300002)(8676002)(4326008)(8936002)(70206006)(110136005)(70586007)(316002)(54906003)(7416002)(26005)(16526019)(2616005)(1076003)(45080400002)(478600001)(7696005)(6666004)(30864003)(2906002)(36756003)(921008)(40480700001)(40460700003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Dec 2023 10:07:35.5034 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 379a84bd-84c5-4703-388f-08dbfa30ff98 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044FB.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6008 From: Evan Quan With WBRF feature supported, as a driver responding to the frequencies, amdgpu driver is able to do shadow pstate switching to mitigate possible interference(between its (G-)DDR memory clocks and local radio module frequency bands used by Wifi 6/6e/7). Signed-off-by: Evan Quan Reviewed-by: Mario Limonciello Signed-off-by: Ma Jun -- v1->v2: - update the prompt for feature support(Lijo) v8->v9: - update parameter document for smu_wbrf_event_handler(Simon) v9->v10: v10->v11: - correct the logics for wbrf range sorting(Lijo) v13: - Fix the format issue (IIpo Jarvinen) Signed-off-by: Ma Jun --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 17 ++ drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 191 ++++++++++++++++++ drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 22 ++ drivers/gpu/drm/amd/pm/swsmu/smu_internal.h | 3 + 5 files changed, 235 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 9d92ca157677..dc0712a9005c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -250,6 +250,8 @@ extern int amdgpu_seamless; extern int amdgpu_user_partt_mode; extern int amdgpu_agp; +extern int amdgpu_wbrf; + #define AMDGPU_VM_MAX_NUM_CTX 4096 #define AMDGPU_SG_THRESHOLD (256*1024*1024) #define AMDGPU_WAIT_IDLE_TIMEOUT_IN_MS 3000 diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index 8b33b130ea36..a194db09cde6 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c @@ -208,6 +208,7 @@ int amdgpu_umsch_mm; int amdgpu_seamless = -1; /* auto */ uint amdgpu_debug_mask; int amdgpu_agp = -1; /* auto */ +int amdgpu_wbrf = -1; static void amdgpu_drv_delayed_reset_work_handler(struct work_struct *work); @@ -971,6 +972,22 @@ module_param_named(debug_mask, amdgpu_debug_mask, uint, 0444); MODULE_PARM_DESC(agp, "AGP (-1 = auto (default), 0 = disable, 1 = enable)"); module_param_named(agp, amdgpu_agp, int, 0444); +/** + * DOC: wbrf (int) + * Enable Wifi RFI interference mitigation feature. + * Due to electrical and mechanical constraints there may be likely interference of + * relatively high-powered harmonics of the (G-)DDR memory clocks with local radio + * module frequency bands used by Wifi 6/6e/7. To mitigate the possible RFI interference, + * with this feature enabled, PMFW will use either “shadowed P-State” or “P-State” based + * on active list of frequencies in-use (to be avoided) as part of initial setting or + * P-state transition. However, there may be potential performance impact with this + * feature enabled. + * (0 = disabled, 1 = enabled, -1 = auto (default setting, will be enabled if supported)) + */ +MODULE_PARM_DESC(wbrf, + "Enable Wifi RFI interference mitigation (0 = disabled, 1 = enabled, -1 = auto(default)"); +module_param_named(wbrf, amdgpu_wbrf, int, 0444); + /* These devices are not supported by amdgpu. * They are supported by the mach64, r128, radeon drivers */ diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c index e1a5ee911dbb..2c7507cf256b 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c @@ -1322,6 +1322,170 @@ static int smu_get_thermal_temperature_range(struct smu_context *smu) return ret; } +/** + * smu_wbrf_handle_exclusion_ranges - consume the wbrf exclusion ranges + * + * @smu: smu_context pointer + * + * Retrieve the wbrf exclusion ranges and send them to PMFW for proper handling. + * Returns 0 on success, error on failure. + */ +static int smu_wbrf_handle_exclusion_ranges(struct smu_context *smu) +{ + struct wbrf_ranges_in_out wbrf_exclusion = {0}; + struct freq_band_range *wifi_bands = wbrf_exclusion.band_list; + struct amdgpu_device *adev = smu->adev; + uint32_t num_of_wbrf_ranges = MAX_NUM_OF_WBRF_RANGES; + uint64_t start, end; + int ret, i, j; + + ret = amd_wbrf_retrieve_freq_band(adev->dev, &wbrf_exclusion); + if (ret) { + dev_err(adev->dev, "Failed to retrieve exclusion ranges!\n"); + return ret; + } + + /* + * The exclusion ranges array we got might be filled with holes and duplicate + * entries. For example: + * {(2400, 2500), (0, 0), (6882, 6962), (2400, 2500), (0, 0), (6117, 6189), (0, 0)...} + * We need to do some sortups to eliminate those holes and duplicate entries. + * Expected output: {(2400, 2500), (6117, 6189), (6882, 6962), (0, 0)...} + */ + for (i = 0; i < num_of_wbrf_ranges; i++) { + start = wifi_bands[i].start; + end = wifi_bands[i].end; + + /* get the last valid entry to fill the intermediate hole */ + if (!start && !end) { + for (j = num_of_wbrf_ranges - 1; j > i; j--) + if (wifi_bands[j].start && wifi_bands[j].end) + break; + + /* no valid entry left */ + if (j <= i) + break; + + start = wifi_bands[i].start = wifi_bands[j].start; + end = wifi_bands[i].end = wifi_bands[j].end; + wifi_bands[j].start = 0; + wifi_bands[j].end = 0; + num_of_wbrf_ranges = j; + } + + /* eliminate duplicate entries */ + for (j = i + 1; j < num_of_wbrf_ranges; j++) { + if ((wifi_bands[j].start == start) && (wifi_bands[j].end == end)) { + wifi_bands[j].start = 0; + wifi_bands[j].end = 0; + } + } + } + + /* Send the sorted wifi_bands to PMFW */ + ret = smu_set_wbrf_exclusion_ranges(smu, wifi_bands); + /* Try to set the wifi_bands again */ + if (unlikely(ret == -EBUSY)) { + mdelay(5); + ret = smu_set_wbrf_exclusion_ranges(smu, wifi_bands); + } + + return ret; +} + +/** + * smu_wbrf_event_handler - handle notify events + * + * @nb: notifier block + * @action: event type + * @_arg: event data + * + * Calls relevant amdgpu function in response to wbrf event + * notification from kernel. + */ +static int smu_wbrf_event_handler(struct notifier_block *nb, + unsigned long action, void *_arg) +{ + struct smu_context *smu = container_of(nb, struct smu_context, wbrf_notifier); + + switch (action) { + case WBRF_CHANGED: + smu_wbrf_handle_exclusion_ranges(smu); + break; + default: + return NOTIFY_DONE; + }; + + return NOTIFY_OK; +} + +/** + * smu_wbrf_support_check - check wbrf support + * + * @smu: smu_context pointer + * + * Verifies the ACPI interface whether wbrf is supported. + */ +static void smu_wbrf_support_check(struct smu_context *smu) +{ + struct amdgpu_device *adev = smu->adev; + + smu->wbrf_supported = smu_is_asic_wbrf_supported(smu) && amdgpu_wbrf && + acpi_amd_wbrf_supported_consumer(adev->dev); + + if (smu->wbrf_supported) + dev_info(adev->dev, "RF interference mitigation is supported\n"); +} + +/** + * smu_wbrf_init - init driver wbrf support + * + * @smu: smu_context pointer + * + * Verifies the AMD ACPI interfaces and registers with the wbrf + * notifier chain if wbrf feature is supported. + * Returns 0 on success, error on failure. + */ +static int smu_wbrf_init(struct smu_context *smu) +{ + struct amdgpu_device *adev = smu->adev; + int ret; + + if (!smu->wbrf_supported) + return 0; + + smu->wbrf_notifier.notifier_call = smu_wbrf_event_handler; + ret = amd_wbrf_register_notifier(&smu->wbrf_notifier); + if (ret) + return ret; + + /* + * Some wifiband exclusion ranges may be already there + * before our driver loaded. To make sure our driver + * is awared of those exclusion ranges. + */ + ret = smu_wbrf_handle_exclusion_ranges(smu); + if (ret) + dev_err(adev->dev, "Failed to handle wbrf exclusion ranges\n"); + + return ret; +} + +/** + * smu_wbrf_fini - tear down driver wbrf support + * + * @smu: smu_context pointer + * + * Unregisters with the wbrf notifier chain. + */ +static void smu_wbrf_fini(struct smu_context *smu) +{ + if (!smu->wbrf_supported) + return; + + amd_wbrf_unregister_notifier(&smu->wbrf_notifier); +} + static int smu_smc_hw_setup(struct smu_context *smu) { struct smu_feature *feature = &smu->smu_feature; @@ -1414,6 +1578,15 @@ static int smu_smc_hw_setup(struct smu_context *smu) if (ret) return ret; + /* Enable UclkShadow on wbrf supported */ + if (smu->wbrf_supported) { + ret = smu_enable_uclk_shadow(smu, true); + if (ret) { + dev_err(adev->dev, "Failed to enable UclkShadow feature to support wbrf!\n"); + return ret; + } + } + /* * With SCPM enabled, these actions(and relevant messages) are * not needed and permitted. @@ -1512,6 +1685,15 @@ static int smu_smc_hw_setup(struct smu_context *smu) */ ret = smu_set_min_dcef_deep_sleep(smu, smu->smu_table.boot_values.dcefclk / 100); + if (ret) { + dev_err(adev->dev, "Error setting min deepsleep dcefclk\n"); + return ret; + } + + /* Init wbrf support. Properly setup the notifier */ + ret = smu_wbrf_init(smu); + if (ret) + dev_err(adev->dev, "Error during wbrf init call\n"); return ret; } @@ -1567,6 +1749,13 @@ static int smu_hw_init(void *handle) return ret; } + /* + * Check whether wbrf is supported. This needs to be done + * before SMU setup starts since part of SMU configuration + * relies on this. + */ + smu_wbrf_support_check(smu); + if (smu->is_apu) { ret = smu_set_gfx_imu_enable(smu); if (ret) @@ -1733,6 +1922,8 @@ static int smu_smc_hw_cleanup(struct smu_context *smu) struct amdgpu_device *adev = smu->adev; int ret = 0; + smu_wbrf_fini(smu); + cancel_work_sync(&smu->throttling_logging_work); cancel_work_sync(&smu->interrupt_work); diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h index b1b1154d70a5..620e53cc3a61 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h @@ -22,6 +22,8 @@ #ifndef __AMDGPU_SMU_H__ #define __AMDGPU_SMU_H__ +#include + #include "amdgpu.h" #include "kgd_pp_interface.h" #include "dm_pp_interface.h" @@ -569,6 +571,10 @@ struct smu_context { struct delayed_work swctf_delayed_work; enum pp_xgmi_plpd_mode plpd_mode; + + /* data structures for wbrf feature support */ + bool wbrf_supported; + struct notifier_block wbrf_notifier; }; struct i2c_adapter; @@ -1365,6 +1371,22 @@ struct pptable_funcs { * @notify_rlc_state: Notify RLC power state to SMU. */ int (*notify_rlc_state)(struct smu_context *smu, bool en); + + /** + * @is_asic_wbrf_supported: check whether PMFW supports the wbrf feature + */ + bool (*is_asic_wbrf_supported)(struct smu_context *smu); + + /** + * @enable_uclk_shadow: Enable the uclk shadow feature on wbrf supported + */ + int (*enable_uclk_shadow)(struct smu_context *smu, bool enable); + + /** + * @set_wbrf_exclusion_ranges: notify SMU the wifi bands occupied + */ + int (*set_wbrf_exclusion_ranges)(struct smu_context *smu, + struct freq_band_range *exclusion_ranges); }; typedef enum { diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h b/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h index 64766ac69c53..6f4d212607d7 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h +++ b/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h @@ -98,6 +98,9 @@ #define smu_set_config_table(smu, config_table) smu_ppt_funcs(set_config_table, -EOPNOTSUPP, smu, config_table) #define smu_init_pptable_microcode(smu) smu_ppt_funcs(init_pptable_microcode, 0, smu) #define smu_notify_rlc_state(smu, en) smu_ppt_funcs(notify_rlc_state, 0, smu, en) +#define smu_is_asic_wbrf_supported(smu) smu_ppt_funcs(is_asic_wbrf_supported, false, smu) +#define smu_enable_uclk_shadow(smu, enable) smu_ppt_funcs(enable_uclk_shadow, 0, smu, enable) +#define smu_set_wbrf_exclusion_ranges(smu, freq_band_range) smu_ppt_funcs(set_wbrf_exclusion_ranges, -EOPNOTSUPP, smu, freq_band_range) #endif #endif -- 2.34.1