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charset="utf-8" Precedence: bulk X-Mailing-List: linux-wireless@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: Re: [PATCH v2 01/11] wifi: rtw89: correct PHY register offset for PHY-1 From: Kalle Valo In-Reply-To: <20240209065229.34515-2-pkshih@realtek.com> References: <20240209065229.34515-2-pkshih@realtek.com> To: Ping-Ke Shih Cc: , , , User-Agent: pwcli/0.1.1-git (https://github.com/kvalo/pwcli/) Python/3.11.2 Message-ID: <170775238041.2851594.4571225717771729904.kvalo@kernel.org> Date: Mon, 12 Feb 2024 15:39:42 +0000 (UTC) Ping-Ke Shih wrote: > PHY-1 can be seen as a copy of PHY-0, and the difference is their base > register address, so add a function to get offset to access PHY-1. > > Signed-off-by: Ping-Ke Shih 11 patches applied to wireless-next.git, thanks. db84b758541f wifi: rtw89: correct PHY register offset for PHY-1 e10cd2ddd89e wifi: rtw89: load BB parameters to PHY-1 b6e65d18bc2e wifi: rtw89: mac: return held quota of DLE when changing MAC-1 b204d2475266 wifi: rtw89: mac: correct MUEDCA setting for MAC-1 fecf6b57fbc7 wifi: rtw89: mac: reset PHY-1 hardware when going to enable/disable 505b57d08f72 wifi: rtw89: use PLCP information to match BSS_COLOR and AID 49ea98235ada wifi: rtw89: differentiate narrow_bw_ru_dis setting according to chip gen ef95df598622 wifi: rtw89: 8922a: correct register definition and merge IO for ctrl_nbtg_bt_tx() 598481c6eb20 wifi: rtw89: 8922a: implement AP mode related reg for BE generation 5f9c264f8e09 wifi: rtw89: reference quota mode when setting Tx power 4ae8ac201ddb wifi: rtw89: change qutoa to DBCC by default for WiFi 7 chips -- https://patchwork.kernel.org/project/linux-wireless/patch/20240209065229.34515-2-pkshih@realtek.com/ https://wireless.wiki.kernel.org/en/developers/documentation/submittingpatches