2015-02-12 05:46:26

by George Cherian

[permalink] [raw]
Subject: [PATCH] usb: dwc3: dwc3-omap: Fix disable IRQ

In the wrapper the IRQ disable should be done by writing 1's to the
IRQ*_CLR register. Existing code is broken because it instead writes
zeros to IRQ*_SET register.

Fix this by adding functions dwc3_omap_write_irqmisc_clr() and
dwc3_omap_write_irq0_clr() which do the right thing.

Signed-off-by: George Cherian <[email protected]>
---
drivers/usb/dwc3/dwc3-omap.c | 30 ++++++++++++++++++++++++++++--
1 file changed, 28 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/dwc3/dwc3-omap.c b/drivers/usb/dwc3/dwc3-omap.c
index 172d64e..52e0c4e 100644
--- a/drivers/usb/dwc3/dwc3-omap.c
+++ b/drivers/usb/dwc3/dwc3-omap.c
@@ -205,6 +205,18 @@ static void dwc3_omap_write_irq0_set(struct dwc3_omap *omap, u32 value)
omap->irq0_offset, value);
}

+static void dwc3_omap_write_irqmisc_clr(struct dwc3_omap *omap, u32 value)
+{
+ dwc3_omap_writel(omap->base, USBOTGSS_IRQENABLE_CLR_MISC +
+ omap->irqmisc_offset, value);
+}
+
+static void dwc3_omap_write_irq0_clr(struct dwc3_omap *omap, u32 value)
+{
+ dwc3_omap_writel(omap->base, USBOTGSS_IRQENABLE_CLR_0 -
+ omap->irq0_offset, value);
+}
+
static void dwc3_omap_set_mailbox(struct dwc3_omap *omap,
enum omap_dwc3_vbus_id_status status)
{
@@ -345,9 +357,23 @@ static void dwc3_omap_enable_irqs(struct dwc3_omap *omap)

static void dwc3_omap_disable_irqs(struct dwc3_omap *omap)
{
+ u32 reg;
+
/* disable all IRQs */
- dwc3_omap_write_irqmisc_set(omap, 0x00);
- dwc3_omap_write_irq0_set(omap, 0x00);
+ reg = USBOTGSS_IRQO_COREIRQ_ST;
+ dwc3_omap_write_irq0_clr(omap, reg);
+
+ reg = (USBOTGSS_IRQMISC_OEVT |
+ USBOTGSS_IRQMISC_DRVVBUS_RISE |
+ USBOTGSS_IRQMISC_CHRGVBUS_RISE |
+ USBOTGSS_IRQMISC_DISCHRGVBUS_RISE |
+ USBOTGSS_IRQMISC_IDPULLUP_RISE |
+ USBOTGSS_IRQMISC_DRVVBUS_FALL |
+ USBOTGSS_IRQMISC_CHRGVBUS_FALL |
+ USBOTGSS_IRQMISC_DISCHRGVBUS_FALL |
+ USBOTGSS_IRQMISC_IDPULLUP_FALL);
+
+ dwc3_omap_write_irqmisc_clr(omap, reg);
}

static u64 dwc3_omap_dma_mask = DMA_BIT_MASK(32);
--
1.8.3.1


2015-02-12 18:22:34

by Felipe Balbi

[permalink] [raw]
Subject: Re: [PATCH] usb: dwc3: dwc3-omap: Fix disable IRQ

On Thu, Feb 12, 2015 at 11:13:16AM +0530, George Cherian wrote:
> In the wrapper the IRQ disable should be done by writing 1's to the
> IRQ*_CLR register. Existing code is broken because it instead writes
> zeros to IRQ*_SET register.
>
> Fix this by adding functions dwc3_omap_write_irqmisc_clr() and
> dwc3_omap_write_irq0_clr() which do the right thing.
>
> Signed-off-by: George Cherian <[email protected]>

please resend with:

Fixes: 72246da40f37 (usb: Introduce DesignWare USB3 DRD Driver)
Cc: <[email protected]> # v3.2+

> ---
> drivers/usb/dwc3/dwc3-omap.c | 30 ++++++++++++++++++++++++++++--
> 1 file changed, 28 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/usb/dwc3/dwc3-omap.c b/drivers/usb/dwc3/dwc3-omap.c
> index 172d64e..52e0c4e 100644
> --- a/drivers/usb/dwc3/dwc3-omap.c
> +++ b/drivers/usb/dwc3/dwc3-omap.c
> @@ -205,6 +205,18 @@ static void dwc3_omap_write_irq0_set(struct dwc3_omap *omap, u32 value)
> omap->irq0_offset, value);
> }
>
> +static void dwc3_omap_write_irqmisc_clr(struct dwc3_omap *omap, u32 value)
> +{
> + dwc3_omap_writel(omap->base, USBOTGSS_IRQENABLE_CLR_MISC +
> + omap->irqmisc_offset, value);
> +}
> +
> +static void dwc3_omap_write_irq0_clr(struct dwc3_omap *omap, u32 value)
> +{
> + dwc3_omap_writel(omap->base, USBOTGSS_IRQENABLE_CLR_0 -
> + omap->irq0_offset, value);
> +}
> +
> static void dwc3_omap_set_mailbox(struct dwc3_omap *omap,
> enum omap_dwc3_vbus_id_status status)
> {
> @@ -345,9 +357,23 @@ static void dwc3_omap_enable_irqs(struct dwc3_omap *omap)
>
> static void dwc3_omap_disable_irqs(struct dwc3_omap *omap)
> {
> + u32 reg;
> +
> /* disable all IRQs */
> - dwc3_omap_write_irqmisc_set(omap, 0x00);
> - dwc3_omap_write_irq0_set(omap, 0x00);
> + reg = USBOTGSS_IRQO_COREIRQ_ST;
> + dwc3_omap_write_irq0_clr(omap, reg);
> +
> + reg = (USBOTGSS_IRQMISC_OEVT |
> + USBOTGSS_IRQMISC_DRVVBUS_RISE |
> + USBOTGSS_IRQMISC_CHRGVBUS_RISE |
> + USBOTGSS_IRQMISC_DISCHRGVBUS_RISE |
> + USBOTGSS_IRQMISC_IDPULLUP_RISE |
> + USBOTGSS_IRQMISC_DRVVBUS_FALL |
> + USBOTGSS_IRQMISC_CHRGVBUS_FALL |
> + USBOTGSS_IRQMISC_DISCHRGVBUS_FALL |
> + USBOTGSS_IRQMISC_IDPULLUP_FALL);
> +
> + dwc3_omap_write_irqmisc_clr(omap, reg);
> }
>
> static u64 dwc3_omap_dma_mask = DMA_BIT_MASK(32);
> --
> 1.8.3.1
>

--
balbi

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2015-02-13 04:47:26

by George Cherian

[permalink] [raw]
Subject: Re: [PATCH] usb: dwc3: dwc3-omap: Fix disable IRQ


On 02/12/2015 11:52 PM, Felipe Balbi wrote:
> On Thu, Feb 12, 2015 at 11:13:16AM +0530, George Cherian wrote:
>> >In the wrapper the IRQ disable should be done by writing 1's to the
>> >IRQ*_CLR register. Existing code is broken because it instead writes
>> >zeros to IRQ*_SET register.
>> >
>> >Fix this by adding functions dwc3_omap_write_irqmisc_clr() and
>> >dwc3_omap_write_irq0_clr() which do the right thing.
>> >
>> >Signed-off-by: George Cherian<[email protected]>
> please resend with:
>
> Fixes: 72246da40f37 (usb: Introduce DesignWare USB3 DRD Driver)
> Cc:<[email protected]> # v3.2+
Done!!