2003-02-25 22:42:16

by Stian Jordet

[permalink] [raw]
Subject: weird interrupt sharing between cpu's

Hi,

Is it correct that cpu1 don't have any interrupts in timer? Or anything
else..?

Regards,
Stian


chevrolet:~# cat /proc/interrupts
CPU0 CPU1
0: 5449292 0 IO-APIC-edge timer
1: 22650 0 IO-APIC-edge i8042
2: 0 0 XT-PIC cascade
8: 4 0 IO-APIC-edge rtc
9: 29738 0 IO-APIC-level acpi, uhci-hcd, uhci-hcd,
uhci-hcd
12: 64723 0 IO-APIC-edge i8042
14: 21 0 IO-APIC-edge ide0
17: 43552 1 IO-APIC-level aic7xxx, EMU10K1
18: 311 1 IO-APIC-level aic7xxx, Ricoh Co Ltd
RL5c476 II
19: 29533 1 IO-APIC-level Ricoh Co Ltd RL5c476 II
(#2), eth0
NMI: 0 0
LOC: 5449580 5449579
ERR: 0
MIS: 0
chevrolet:~#