2017-04-23 06:06:38

by David E. Box

Subject: [PATCH] x86/intel_idle: add GLK support

From: "Box, David E" <[email protected]>

Gemini Lake uses the same C-states as Broxton and also uses the
IRTL MSR's to determine maximum C-state latency.

Signed-off-by: David E. Box <[email protected]>
---
drivers/idle/intel_idle.c | 2 ++
1 file changed, 2 insertions(+)

diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
index e045a5c..778af71 100644
--- a/drivers/idle/intel_idle.c
+++ b/drivers/idle/intel_idle.c
@@ -1097,6 +1097,7 @@ static const struct x86_cpu_id intel_idle_ids[] __initconst = {
ICPU(INTEL_FAM6_XEON_PHI_KNL, idle_cpu_knl),
ICPU(INTEL_FAM6_XEON_PHI_KNM, idle_cpu_knl),
ICPU(INTEL_FAM6_ATOM_GOLDMONT, idle_cpu_bxt),
+ ICPU(INTEL_FAM6_ATOM_GEMINI_LAKE, idle_cpu_bxt),
ICPU(INTEL_FAM6_ATOM_DENVERTON, idle_cpu_dnv),
{}
};
@@ -1309,6 +1310,7 @@ static void intel_idle_state_table_update(void)
ivt_idle_state_table_update();
break;
case INTEL_FAM6_ATOM_GOLDMONT:
+ case INTEL_FAM6_ATOM_GEMINI_LAKE:
bxt_idle_state_table_update();
break;
case INTEL_FAM6_SKYLAKE_DESKTOP:
--
2.9.3

2017-04-26 22:43:06

by Rafael J. Wysocki

Subject: Re: [PATCH] x86/intel_idle: add GLK support

On Saturday, April 22, 2017 11:06:25 PM David E. Box wrote:
> From: "Box, David E" <[email protected]>
>
> Gemini Lake uses the same C-states as Broxton and also uses the
> IRTL MSR's to determine maximum C-state latency.
>
> Signed-off-by: David E. Box <[email protected]>

You could use the code names consistently in your subjects (but I can fix this up).

Jacob, any concerns?

> ---
> drivers/idle/intel_idle.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
> index e045a5c..778af71 100644
> --- a/drivers/idle/intel_idle.c
> +++ b/drivers/idle/intel_idle.c
> @@ -1097,6 +1097,7 @@ static const struct x86_cpu_id intel_idle_ids[] __initconst = {
> ICPU(INTEL_FAM6_XEON_PHI_KNL, idle_cpu_knl),
> ICPU(INTEL_FAM6_XEON_PHI_KNM, idle_cpu_knl),
> ICPU(INTEL_FAM6_ATOM_GOLDMONT, idle_cpu_bxt),
> + ICPU(INTEL_FAM6_ATOM_GEMINI_LAKE, idle_cpu_bxt),
> ICPU(INTEL_FAM6_ATOM_DENVERTON, idle_cpu_dnv),
> {}
> };
> @@ -1309,6 +1310,7 @@ static void intel_idle_state_table_update(void)
> ivt_idle_state_table_update();
> break;
> case INTEL_FAM6_ATOM_GOLDMONT:
> + case INTEL_FAM6_ATOM_GEMINI_LAKE:
> bxt_idle_state_table_update();
> break;
> case INTEL_FAM6_SKYLAKE_DESKTOP:
>

2017-04-29 03:56:26

by Len Brown

Subject: Re: [PATCH] x86/intel_idle: add GLK support

Acked-by: Len Brown <[email protected]>

On Sun, Apr 23, 2017 at 2:06 AM, David E. Box
<[email protected]> wrote:
> From: "Box, David E" <[email protected]>
>
> Gemini Lake uses the same C-states as Broxton and also uses the
> IRTL MSR's to determine maximum C-state latency.
>
> Signed-off-by: David E. Box <[email protected]>
> ---
> drivers/idle/intel_idle.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
> index e045a5c..778af71 100644
> --- a/drivers/idle/intel_idle.c
> +++ b/drivers/idle/intel_idle.c
> @@ -1097,6 +1097,7 @@ static const struct x86_cpu_id intel_idle_ids[] __initconst = {
> ICPU(INTEL_FAM6_XEON_PHI_KNL, idle_cpu_knl),
> ICPU(INTEL_FAM6_XEON_PHI_KNM, idle_cpu_knl),
> ICPU(INTEL_FAM6_ATOM_GOLDMONT, idle_cpu_bxt),
> + ICPU(INTEL_FAM6_ATOM_GEMINI_LAKE, idle_cpu_bxt),
> ICPU(INTEL_FAM6_ATOM_DENVERTON, idle_cpu_dnv),
> {}
> };
> @@ -1309,6 +1310,7 @@ static void intel_idle_state_table_update(void)
> ivt_idle_state_table_update();
> break;
> case INTEL_FAM6_ATOM_GOLDMONT:
> + case INTEL_FAM6_ATOM_GEMINI_LAKE:
> bxt_idle_state_table_update();
> break;
> case INTEL_FAM6_SKYLAKE_DESKTOP:
> --
> 2.9.3
>



--
Len Brown, Intel Open Source Technology Center