Ensure the ordering of the fifo write and the update of the write index,
so that the index is not updated before the data has landed in the fifo.
Reported-by: Arun Kumar Neelakantam <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
---
drivers/rpmsg/qcom_glink_smem.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/rpmsg/qcom_glink_smem.c b/drivers/rpmsg/qcom_glink_smem.c
index 057528e23d3a..892f2b92a4d8 100644
--- a/drivers/rpmsg/qcom_glink_smem.c
+++ b/drivers/rpmsg/qcom_glink_smem.c
@@ -183,6 +183,9 @@ static void glink_smem_tx_write(struct qcom_glink_pipe *glink_pipe,
if (head >= pipe->native.length)
head -= pipe->native.length;
+ /* Ensure ordering of fifo and head update */
+ wmb();
+
*pipe->head = cpu_to_le32(head);
}
--
2.15.0
On 12/14/2017 12:15 PM, Bjorn Andersson wrote:
> Ensure the ordering of the fifo write and the update of the write index,
> so that the index is not updated before the data has landed in the fifo.
>
> Reported-by: Arun Kumar Neelakantam <[email protected]>
> Signed-off-by: Bjorn Andersson <[email protected]>
> ---
Acked-By: Chris Lew <[email protected]>
--
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