2005-02-17 06:33:48

by YhLu

Subject: interrupt

Interrupts always go to CPU 11.

If dual core is diabled, it always go to CPU5. It is OK on 32bit mode.

CPU0 CPU1 CPU2 CPU3 CPU4 CPU5
CPU6 CPU7 CPU8 CPU9 CPU10 CPU11 CPU12
CPU13 CPU14 CPU15
0: 409 0 0 0 0 0
0 0 0 0 229 37399 0
0 0 0 IO-APIC-edge timer
2: 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 XT-PIC cascade
4: 0 0 0 0 0 0
0 0 0 0 0 4915 0
0 0 0 IO-APIC-edge serial
8: 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IO-APIC-edge rtc
14: 0 0 0 0 0 0
0 0 0 0 0 10 0
0 0 0 IO-APIC-edge ide0
19: 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IO-APIC-level ohci1394
20: 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IO-APIC-level libata
21: 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IO-APIC-level libata
22: 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IO-APIC-level ohci_hcd
23: 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IO-APIC-level ehci_hcd
NMI: 1 0 0 0 0 0
0 0 0 0 0 1 0
0 0 0
LOC: 37688 37965 37965 37965 37965 37965
37965 37965 37965 37965 37965 37446 37965
37965 37965 37966
ERR: 447
MIS: 0

2005-02-17 06:35:43

by Andi Kleen

Subject: Re: interrupt

On Wed, Feb 16, 2005 at 10:47:07PM -0800, YhLu wrote:
> Interrupts always go to CPU 11.

Run irqbalanced, but even then multiple CPUs
will only be used when there are enough active interrupt sources.

-Andi