On Wed, Nov 08, 2000 at 09:37:44AM -0800, Richard Henderson wrote:
> Interesting. I hadn't known that. It didn't actually fail with
> the ALI bridge, I just assumed it was a mistake. Can anyone with
> docs on non-DEC bridges confirm that this is a common thing?
It would be better if someone who has "PCI-to-PCI Bridge Architecture
Specification" handy could confirm this. Non-conforming hardware
must live in quirks/fixups etc. ;-)
I've found some interesting info today - application note on programming
the DEC 21052 bridge (ruffian has this chip, btw):
Particularly, there are examples for setting up that bridge for IO or MEM
only configurations. For example, with IO disabled:
1. Set IO base = 0xffff, limit = 0
2. Set command register = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER
> Certainly the fact should be commented if the old code goes back
> in to avoid disruption by helpful folks like myself. :-)
That change wasn't bad at all - at least it's 100% safe :-)
But of course, it would be better to have unused regions disabled
in a clean way.
But actually I'm concerned that all this code doesn't work at all -
see reports from Michal Jaegermann (the bridge acts as if it drops
config space transactions randomly). I have a lot of suggestions, but
it's a pain to debug something without access to real hardware - just
a waste of the precious time of everyone who is involved...
So I would probably wait a week or two until I'll have something with