Export the hdmiphy clock mux via the newly added clock-id.
Signed-off-by: Heiko Stuebner <[email protected]>
---
drivers/clk/rockchip/clk-rk3228.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/rockchip/clk-rk3228.c b/drivers/clk/rockchip/clk-rk3228.c
index 1c5267d134ee..d17cfb7a3ff4 100644
--- a/drivers/clk/rockchip/clk-rk3228.c
+++ b/drivers/clk/rockchip/clk-rk3228.c
@@ -247,7 +247,7 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
RK2928_CLKGATE_CON(4), 0, GFLAGS),
/* PD_MISC */
- MUX(0, "hdmiphy", mux_hdmiphy_p, CLK_SET_RATE_PARENT,
+ MUX(SCLK_HDMI_PHY, "hdmiphy", mux_hdmiphy_p, CLK_SET_RATE_PARENT,
RK2928_MISC_CON, 13, 1, MFLAGS),
MUX(0, "usb480m_phy", mux_usb480m_phy_p, CLK_SET_RATE_PARENT,
RK2928_MISC_CON, 14, 1, MFLAGS),
--
2.20.1
On 2019-06-14 18:54, Heiko Stuebner wrote:
> Export the hdmiphy clock mux via the newly added clock-id.
>
> Signed-off-by: Heiko Stuebner <[email protected]>
> ---
> drivers/clk/rockchip/clk-rk3228.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/rockchip/clk-rk3228.c
> b/drivers/clk/rockchip/clk-rk3228.c
> index 1c5267d134ee..d17cfb7a3ff4 100644
> --- a/drivers/clk/rockchip/clk-rk3228.c
> +++ b/drivers/clk/rockchip/clk-rk3228.c
> @@ -247,7 +247,7 @@ static struct rockchip_clk_branch
> rk3228_clk_branches[] __initdata = {
> RK2928_CLKGATE_CON(4), 0, GFLAGS),
>
> /* PD_MISC */
> - MUX(0, "hdmiphy", mux_hdmiphy_p, CLK_SET_RATE_PARENT,
> + MUX(SCLK_HDMI_PHY, "hdmiphy", mux_hdmiphy_p, CLK_SET_RATE_PARENT,
> RK2928_MISC_CON, 13, 1, MFLAGS),
> MUX(0, "usb480m_phy", mux_usb480m_phy_p, CLK_SET_RATE_PARENT,
> RK2928_MISC_CON, 14, 1, MFLAGS),
Tested-by: Justin Swartz <[email protected]>