2022-04-05 01:35:28

by Adam Ford

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Subject: [PATCH V3 0/4] Fixup fsl-imx-ehci fallback

The imx8mm-usdhc is a superset of the imx7d-usdhc which adds
HS400-ES.
The i.MX8MN and i.MX8MP both support the HS400-ES so the fallback
to imx8mm-usdhc is more correct since they share the same IP block
as the imx8mm. This series updates the YAML file to show the updated
compatible fallbacks while keeping the older imx7d-usdhc to prevent
breakage and keep backwards compatibility. However, a note was added
indicating the imx7d fallback was deprecated for certain devices.
It then updates the imx8mn and imx8mp to fallback to both imx8mm and
imx7d to enable the missing HS400-ES functionality.

Adam Ford (3):
dt-bindings: mmc: imx-esdhc: Update compatible fallbacks
arm64: dts: imx8mn: Enable HS400-ES
arm64: dts: imx8mp: Enable HS400-ES

.../bindings/mmc/fsl-imx-esdhc.yaml | 21 +-
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 6 +-
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 6 +-

--
2.34.1


2022-04-05 03:05:19

by Adam Ford

[permalink] [raw]
Subject: [PATCH V3 3/3] arm64: dts: imx8mp: Enable HS400-ES

The SDHC controller in the imx8mp has the same controller
as the imx8mm which supports HS400-ES. Change the compatible
fallback to imx8mm to enable it, but keep the imx7d-usdhc
to prevent breaking backwards compatibility.

Signed-off-by: Adam Ford <[email protected]>
---
V3: Keep the fsl,imx7d-usdhc to keep backwards compatiblity and prevent breaking something.

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 794d75173cf5..8578ff1062e6 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -769,7 +769,7 @@ i2c6: i2c@30ae0000 {
};

usdhc1: mmc@30b40000 {
- compatible = "fsl,imx8mp-usdhc", "fsl,imx7d-usdhc";
+ compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
reg = <0x30b40000 0x10000>;
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MP_CLK_DUMMY>,
@@ -783,7 +783,7 @@ usdhc1: mmc@30b40000 {
};

usdhc2: mmc@30b50000 {
- compatible = "fsl,imx8mp-usdhc", "fsl,imx7d-usdhc";
+ compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
reg = <0x30b50000 0x10000>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MP_CLK_DUMMY>,
@@ -797,7 +797,7 @@ usdhc2: mmc@30b50000 {
};

usdhc3: mmc@30b60000 {
- compatible = "fsl,imx8mp-usdhc", "fsl,imx7d-usdhc";
+ compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
reg = <0x30b60000 0x10000>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MP_CLK_DUMMY>,
--
2.34.1