Geni based QUP controller currently has child nodes bindings defined in
same parent schema. Documentation of few other properties were also
omitted intially. The list becomes too long with addition of these
properties. Therefore, move out child bindings from parent schema to
respective places as a part of cleanup process and update reference for
it. Please note, individual bindings will now stand complete as
previously some properties were defined in core and rest in parent
schema.
This patchset adds individual bindings for uart and i2c controller, spi
controller is taken care by Krzystof. SPI patches[1] are required for
complete changes. Once all bindings gets places correctly, remove common
properties defined in parent as the final step.
[1] https://lore.kernel.org/linux-spi/20220331175817.GA91341@9a2d8922b8f1/T/#m2ef266d9f5cf643bb5be17f3a175c638bde3a680
Looking forward for feeback and review comments. Thanks!
Kuldeep Singh (5):
dt-bindings: i2c: Add Qualcomm Geni based QUP i2c bindings
dt-bindings: qcom: geni-se: Update i2c schema reference
dt-bindings: serial: Update Qualcomm geni based QUP uart bindings
dt-bindings: qcom: geni-se: Update uart schema reference
dt-bindings: qcom: geni-se: Remove common controller properties
.../bindings/i2c/qcom,i2c-geni-qcom.yaml | 110 ++++++++++++++++++
.../serial/qcom,serial-geni-qcom.yaml | 86 ++++++++++++++
.../bindings/soc/qcom/qcom,geni-se.yaml | 77 +-----------
3 files changed, 198 insertions(+), 75 deletions(-)
create mode 100644 Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml
create mode 100644 Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml
--
2.25.1
We now have geni based QUP uart controller binding in place as
dt-bindings/serial/qcom,serial-geni-qcom.yaml similar to other
controllers, update reference in parent schema and while at it, also
remove properties defined for the controller from commown wrapper.
Signed-off-by: Kuldeep Singh <[email protected]>
---
.../bindings/soc/qcom/qcom,geni-se.yaml | 18 +-----------------
1 file changed, 1 insertion(+), 17 deletions(-)
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml
index e6073923e03a..9f72c676b22c 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml
@@ -133,23 +133,7 @@ patternProperties:
"serial@[0-9a-f]+$":
type: object
description: GENI Serial Engine based UART Controller.
- $ref: /schemas/serial.yaml#
-
- properties:
- compatible:
- enum:
- - qcom,geni-uart
- - qcom,geni-debug-uart
-
- interrupts:
- minItems: 1
- items:
- - description: UART core irq
- - description: Wakeup irq (RX GPIO)
-
- required:
- - compatible
- - interrupts
+ $ref: /schemas/serial/qcom,serial-geni-qcom.yaml#
additionalProperties: false
--
2.25.1
On 02/04/2022 07:12, Kuldeep Singh wrote:
> We now have geni based QUP uart controller binding in place as
s/uart/UART/
Similar to your previous commit - this could be one, max two sentences...
> dt-bindings/serial/qcom,serial-geni-qcom.yaml similar to other
> controllers, update reference in parent schema and while at it, also
> remove properties defined for the controller from commown wrapper.
s/commown/common/
>
> Signed-off-by: Kuldeep Singh <[email protected]>
> ---
> .../bindings/soc/qcom/qcom,geni-se.yaml | 18 +-----------------
> 1 file changed, 1 insertion(+), 17 deletions(-)
>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
GENI(generic interface) based Qualcomm Universal Peripheral controller
can support multiple serial interfaces like spi,uart and i2c.
Unlike other i2c controllers, QUP i2c bindings are present in parent
schema. Move it out from parent to an individual binding and let parent
refer to child schema later on.
Please note, current schema isn't complete as it misses out few
properties and thus, add these missing properties along the process.
Signed-off-by: Kuldeep Singh <[email protected]>
---
.../bindings/i2c/qcom,i2c-geni-qcom.yaml | 110 ++++++++++++++++++
1 file changed, 110 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml
diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml
new file mode 100644
index 000000000000..01a02e680ea3
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml
@@ -0,0 +1,110 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/i2c/qcom,i2c-geni-qcom.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Qualcomm Geni based QUP I2C Controller
+
+maintainers:
+ - Andy Gross <[email protected]>
+ - Bjorn Andersson <[email protected]>
+
+allOf:
+ - $ref: /schemas/i2c/i2c-controller.yaml#
+
+properties:
+ compatible:
+ enum:
+ - qcom,geni-i2c
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ const: se
+
+ clock-frequency:
+ description: Desired I2C bus clock frequency in Hz
+ default: 100000
+
+ interconnects:
+ maxItems: 3
+
+ interconnect-names:
+ items:
+ - const: qup-core
+ - const: qup-config
+ - const: qup-memory
+
+ interrupts:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+ reg:
+ maxItems: 1
+
+ required-opps:
+ maxItems: 1
+
+ dmas:
+ maxItems: 2
+
+ dma-names:
+ items:
+ - const: tx
+ - const: rx
+
+ pinctrl-0: true
+ pinctrl-1: true
+
+ pinctrl-names:
+ minItems: 1
+ items:
+ - const: default
+ - const: sleep
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+required:
+ - compatible
+ - interrupts
+ - clocks
+ - clock-names
+ - reg
+ - "#address-cells"
+ - "#size-cells"
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/qcom,gcc-sc7180.h>
+ #include <dt-bindings/interconnect/qcom,sc7180.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ i2c@88000 {
+ compatible = "qcom,geni-i2c";
+ reg = <0x00880000 0x4000>;
+ clock-names = "se";
+ clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&qup_i2c0_default>;
+ interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+ <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
+ <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
+ interconnect-names = "qup-core", "qup-config", "qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ };
+...
--
2.25.1
We now have geni based QUP i2c controller binding in place as
dt-bindigs/i2c/qcom,i2c-geni-qcom.yaml similar to other controllers,
update reference in parent schema and while at it, also remove
properties defined for the controller from commown wrapper.
Signed-off-by: Kuldeep Singh <[email protected]>
---
.../bindings/soc/qcom/qcom,geni-se.yaml | 26 +------------------
1 file changed, 1 insertion(+), 25 deletions(-)
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml
index 95fcb43675d6..e6073923e03a 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml
@@ -128,31 +128,7 @@ patternProperties:
"i2c@[0-9a-f]+$":
type: object
description: GENI serial engine based I2C controller.
- $ref: /schemas/i2c/i2c-controller.yaml#
-
- properties:
- compatible:
- enum:
- - qcom,geni-i2c
-
- interrupts:
- maxItems: 1
-
- "#address-cells":
- const: 1
-
- "#size-cells":
- const: 0
-
- clock-frequency:
- description: Desired I2C bus clock frequency in Hz.
- default: 100000
-
- required:
- - compatible
- - interrupts
- - "#address-cells"
- - "#size-cells"
+ $ref: /schemas/i2c/qcom,i2c-geni-qcom.yaml#
"serial@[0-9a-f]+$":
type: object
--
2.25.1