Configure the correct GPIO for UART1 CTS.
Signed-off-by: Tim Harvey <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
index 407ab4592b4c..6692e55df752 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
@@ -651,7 +651,7 @@ &uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>, <&pinctrl_uart1_gpio>;
rts-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;
- cts-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
+ cts-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
uart-has-rtscts;
status = "okay";
};
--
2.25.1
On Fri, Aug 12, 2022 at 10:25:26AM -0700, Tim Harvey wrote:
> Configure the correct GPIO for UART1 CTS.
>
> Signed-off-by: Tim Harvey <[email protected]>
Not sure why you resent it, but it's been landed on mainline [1].
Shawn
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=9635b7134c292db0b6b4d278c88d21035dad4000
> ---
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
> index 407ab4592b4c..6692e55df752 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
> @@ -651,7 +651,7 @@ &uart1 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_uart1>, <&pinctrl_uart1_gpio>;
> rts-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;
> - cts-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
> + cts-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
> uart-has-rtscts;
> status = "okay";
> };
> --
> 2.25.1
>