In case of error condition to avoid system crash
Tegra SDMMC controller requires CMD and DAT resets
issued together.
This is applicable to Tegar186 and later chips.
Signed-off-by: Aniruddha TVS Rao <[email protected]>
Signed-off-by: Prathamesh Shete <[email protected]>
---
drivers/mmc/host/sdhci-tegra.c | 3 ++-
drivers/mmc/host/sdhci.c | 10 ++++++++--
drivers/mmc/host/sdhci.h | 2 ++
3 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index 2d2d8260c681..0a82cbedabe4 100644
--- a/drivers/mmc/host/sdhci-tegra.c
+++ b/drivers/mmc/host/sdhci-tegra.c
@@ -1525,7 +1525,8 @@ static const struct sdhci_pltfm_data sdhci_tegra186_pdata = {
SDHCI_QUIRK_NO_HISPD_BIT |
SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC |
SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
- .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
+ .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
+ SDHCI_QUIRK2_ISSUE_CMD_DAT_RESET_TOGETHER,
.ops = &tegra186_sdhci_ops,
};
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 7689ffec5ad1..89ede0cf674a 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -3063,8 +3063,14 @@ static bool sdhci_request_done(struct sdhci_host *host)
* Spec says we should do both at the same time, but Ricoh
* controllers do not like that.
*/
- sdhci_do_reset(host, SDHCI_RESET_CMD);
- sdhci_do_reset(host, SDHCI_RESET_DATA);
+ if (host->quirks2 &
+ SDHCI_QUIRK2_ISSUE_CMD_DAT_RESET_TOGETHER) {
+ sdhci_do_reset(host, SDHCI_RESET_CMD |
+ SDHCI_RESET_DATA);
+ } else {
+ sdhci_do_reset(host, SDHCI_RESET_CMD);
+ sdhci_do_reset(host, SDHCI_RESET_DATA);
+ }
host->pending_reset = false;
}
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 95a08f09df30..111e9bf98dde 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -480,6 +480,8 @@ struct sdhci_host {
* block count.
*/
#define SDHCI_QUIRK2_USE_32BIT_BLK_CNT (1<<18)
+/* Issue CMD and DATA reset together */
+#define SDHCI_QUIRK2_ISSUE_CMD_DAT_RESET_TOGETHER (1<<19)
int irq; /* Device IRQ */
void __iomem *ioaddr; /* Mapped address */
--
2.17.1
On 12/09/2022 14:27, Prathamesh Shete wrote:
> In case of error condition to avoid system crash
> Tegra SDMMC controller requires CMD and DAT resets
> issued together.
>
> This is applicable to Tegar186 and later chips.
>
> Signed-off-by: Aniruddha TVS Rao <[email protected]>
> Signed-off-by: Prathamesh Shete <[email protected]>
This is a bit confusing ... there is a series with 2 patches and then
this one. This one does not apply on top of the other 2. However, looks
somewhat related to patch 1/2 in the series because it is changing the
same data structure. Probably best to send all 3 in a single series.
Jon
--
nvpublic
> -----Original Message-----
> From: Jonathan Hunter <[email protected]>
> Sent: Monday, September 12, 2022 8:21 PM
> To: Prathamesh Shete <[email protected]>; [email protected];
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; linux-
> [email protected]
> Cc: Aniruddha Tvs Rao <[email protected]>; Suresh Mangipudi
> <[email protected]>
> Subject: Re: [PATCH] mmc: sdhci-tegra: Issue CMD and DAT resets together
>
>
> On 12/09/2022 14:27, Prathamesh Shete wrote:
> > In case of error condition to avoid system crash Tegra SDMMC
> > controller requires CMD and DAT resets issued together.
> >
> > This is applicable to Tegar186 and later chips.
> >
> > Signed-off-by: Aniruddha TVS Rao <[email protected]>
> > Signed-off-by: Prathamesh Shete <[email protected]>
>
>
> This is a bit confusing ... there is a series with 2 patches and then this one. This
> one does not apply on top of the other 2. However, looks somewhat related to
> patch 1/2 in the series because it is changing the same data structure. Probably
> best to send all 3 in a single series.
Agreed. Combined and pushed version2
Thanks
Prathamesh.
>
> Jon
>
> --
> nvpublic