As all level 2 and level 3 caches are unified, add required
cache-unified properties to fix warnings like:
s32g274a-evb.dtb: l2-cache1: 'cache-unified' is a required property
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
Please take the patch via sub-arch SoC tree.
---
arch/arm64/boot/dts/freescale/s32g2.dtsi | 2 ++
arch/arm64/boot/dts/freescale/s32v234.dtsi | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
index d8c82da88ca0..5ac1cc9ff50e 100644
--- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
@@ -53,11 +53,13 @@ cpu3: cpu@101 {
cluster0_l2: l2-cache0 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
cluster1_l2: l2-cache1 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
};
diff --git a/arch/arm64/boot/dts/freescale/s32v234.dtsi b/arch/arm64/boot/dts/freescale/s32v234.dtsi
index 3e306218d533..42409ec56792 100644
--- a/arch/arm64/boot/dts/freescale/s32v234.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32v234.dtsi
@@ -62,11 +62,13 @@ cpu3: cpu@101 {
cluster0_l2_cache: l2-cache0 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
cluster1_l2_cache: l2-cache1 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
};
--
2.34.1
On 22/04/2023 00:32, Krzysztof Kozlowski wrote:
> As all level 2 and level 3 caches are unified, add required
> cache-unified properties to fix warnings like:
>
> s32g274a-evb.dtb: l2-cache1: 'cache-unified' is a required property
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Matthias Brugger <[email protected]>
>
> ---
>
> Please take the patch via sub-arch SoC tree.
> ---
> arch/arm64/boot/dts/freescale/s32g2.dtsi | 2 ++
> arch/arm64/boot/dts/freescale/s32v234.dtsi | 2 ++
> 2 files changed, 4 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> index d8c82da88ca0..5ac1cc9ff50e 100644
> --- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
> +++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> @@ -53,11 +53,13 @@ cpu3: cpu@101 {
> cluster0_l2: l2-cache0 {
> compatible = "cache";
> cache-level = <2>;
> + cache-unified;
> };
>
> cluster1_l2: l2-cache1 {
> compatible = "cache";
> cache-level = <2>;
> + cache-unified;
> };
> };
>
> diff --git a/arch/arm64/boot/dts/freescale/s32v234.dtsi b/arch/arm64/boot/dts/freescale/s32v234.dtsi
> index 3e306218d533..42409ec56792 100644
> --- a/arch/arm64/boot/dts/freescale/s32v234.dtsi
> +++ b/arch/arm64/boot/dts/freescale/s32v234.dtsi
> @@ -62,11 +62,13 @@ cpu3: cpu@101 {
> cluster0_l2_cache: l2-cache0 {
> compatible = "cache";
> cache-level = <2>;
> + cache-unified;
> };
>
> cluster1_l2_cache: l2-cache1 {
> compatible = "cache";
> cache-level = <2>;
> + cache-unified;
> };
> };
>
On Mon, Apr 24, 2023 at 12:37:34PM +0200, Matthias Brugger wrote:
>
>
> On 22/04/2023 00:32, Krzysztof Kozlowski wrote:
> > As all level 2 and level 3 caches are unified, add required
> > cache-unified properties to fix warnings like:
> >
> > s32g274a-evb.dtb: l2-cache1: 'cache-unified' is a required property
> >
> > Signed-off-by: Krzysztof Kozlowski <[email protected]>
>
> Reviewed-by: Matthias Brugger <[email protected]>
>
> >
> > ---
> >
> > Please take the patch via sub-arch SoC tree.
> > ---
> > arch/arm64/boot/dts/freescale/s32g2.dtsi | 2 ++
> > arch/arm64/boot/dts/freescale/s32v234.dtsi | 2 ++
> > 2 files changed, 4 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> > index d8c82da88ca0..5ac1cc9ff50e 100644
> > --- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> > @@ -53,11 +53,13 @@ cpu3: cpu@101 {
> > cluster0_l2: l2-cache0 {
> > compatible = "cache";
> > cache-level = <2>;
> > + cache-unified;
> > };
> > cluster1_l2: l2-cache1 {
> > compatible = "cache";
> > cache-level = <2>;
> > + cache-unified;
> > };
> > };
> > diff --git a/arch/arm64/boot/dts/freescale/s32v234.dtsi b/arch/arm64/boot/dts/freescale/s32v234.dtsi
> > index 3e306218d533..42409ec56792 100644
> > --- a/arch/arm64/boot/dts/freescale/s32v234.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/s32v234.dtsi
> > @@ -62,11 +62,13 @@ cpu3: cpu@101 {
> > cluster0_l2_cache: l2-cache0 {
> > compatible = "cache";
> > cache-level = <2>;
> > + cache-unified;
> > };
> > cluster1_l2_cache: l2-cache1 {
> > compatible = "cache";
> > cache-level = <2>;
> > + cache-unified;
> > };
> > };
Applied to https://github.com/chesterlintw/linux-s32g/tree/s32g2/next
Thanks,
Chester