In many designs the power-domains provided by the GPU clock controller
are powered by some GFX rail, add power-domains as a valid property to
allow this to be specified.
Signed-off-by: Bjorn Andersson <[email protected]>
---
Documentation/devicetree/bindings/clock/qcom,gpucc.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
index 1e3dc9deded9..a00216b3b15a 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
@@ -50,6 +50,9 @@ properties:
- const: gcc_gpu_gpll0_clk_src
- const: gcc_gpu_gpll0_div_clk_src
+ power-domains:
+ maxItems: 1
+
'#clock-cells':
const: 1
--
2.39.2
On 23.05.2023 03:03, Bjorn Andersson wrote:
> In many designs the power-domains provided by the GPU clock controller
> are powered by some GFX rail, add power-domains as a valid property to
> allow this to be specified.
>
> Signed-off-by: Bjorn Andersson <[email protected]>
> ---
You may also wanna add some runtime pm enable calls in the driver
Acked-by: Konrad Dybcio <[email protected]>
Konrad
> Documentation/devicetree/bindings/clock/qcom,gpucc.yaml | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
> index 1e3dc9deded9..a00216b3b15a 100644
> --- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
> +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
> @@ -50,6 +50,9 @@ properties:
> - const: gcc_gpu_gpll0_clk_src
> - const: gcc_gpu_gpll0_div_clk_src
>
> + power-domains:
> + maxItems: 1
> +
> '#clock-cells':
> const: 1
>
On Mon, May 22, 2023 at 06:03:48PM -0700, Bjorn Andersson wrote:
> In many designs the power-domains provided by the GPU clock controller
> are powered by some GFX rail, add power-domains as a valid property to
> allow this to be specified.
>
> Signed-off-by: Bjorn Andersson <[email protected]>
Acked-by: Conor Dooley <[email protected]>
Thanks,
Conor.
> ---
> Documentation/devicetree/bindings/clock/qcom,gpucc.yaml | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
> index 1e3dc9deded9..a00216b3b15a 100644
> --- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
> +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
> @@ -50,6 +50,9 @@ properties:
> - const: gcc_gpu_gpll0_clk_src
> - const: gcc_gpu_gpll0_div_clk_src
>
> + power-domains:
> + maxItems: 1
> +
> '#clock-cells':
> const: 1
>
> --
> 2.39.2
>
On Mon, 22 May 2023 18:03:48 -0700, Bjorn Andersson wrote:
> In many designs the power-domains provided by the GPU clock controller
> are powered by some GFX rail, add power-domains as a valid property to
> allow this to be specified.
>
>
Applied, thanks!
[1/1] dt-bindings: clock: qcom: Accept power-domains for GPUCC
commit: de6d1f0c4919852514459f1876d7168212e5e1cd
Best regards,
--
Bjorn Andersson <[email protected]>