LinuxLists.cc - [PATCH 0/2] SC8280XP clock runtime pm

2023-06-19 16:21:29

Subject: [PATCH 0/2] SC8280XP clock runtime pm

Keeping power domains always enabled hinders power efficiency. Add runtime
PM to 8280 clock controllers to prevent that.

Signed-off-by: Konrad Dybcio <[email protected]>
---
Konrad Dybcio (2):
clk: qcom: gpucc-sc8280xp: Add runtime PM
clk: qcom: gcc-sc8280xp: Add runtime PM

drivers/clk/qcom/gcc-sc8280xp.c | 18 ++++++++++++++++--
drivers/clk/qcom/gpucc-sc8280xp.c | 19 +++++++++++++++++--
2 files changed, 33 insertions(+), 4 deletions(-)
---
base-commit: 47045630bc409ce6606d97b790895210dd1d517d
change-id: 20230619-topic-sc8280xp-clk-rpm-dc80325f0aff

Best regards,
--
Konrad Dybcio <[email protected]>

2023-06-19 16:22:02

by Konrad Dybcio

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Subject: [PATCH 1/2] clk: qcom: gpucc-sc8280xp: Add runtime PM

The GPU_CC block on SC8280XP is powered by the GFX rail. We need to
ensure that it's enabled to prevent unwanted power collapse.

Enable runtime PM to keep the power flowing only when necessary.

Signed-off-by: Konrad Dybcio <[email protected]>
---
drivers/clk/qcom/gpucc-sc8280xp.c | 19 +++++++++++++++++--
1 file changed, 17 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/qcom/gpucc-sc8280xp.c b/drivers/clk/qcom/gpucc-sc8280xp.c
index ea1e9505c335..8e147ee294ee 100644
--- a/drivers/clk/qcom/gpucc-sc8280xp.c
+++ b/drivers/clk/qcom/gpucc-sc8280xp.c
@@ -7,6 +7,7 @@
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
#include <linux/regmap.h>

#include <dt-bindings/clock/qcom,gpucc-sc8280xp.h>
@@ -424,10 +425,21 @@ static struct qcom_cc_desc gpu_cc_sc8280xp_desc = {
static int gpu_cc_sc8280xp_probe(struct platform_device *pdev)
{
struct regmap *regmap;
+ int ret;
+
+ ret = devm_pm_runtime_enable(&pdev->dev);
+ if (ret)
+ return ret;
+
+ ret = pm_runtime_resume_and_get(&pdev->dev);
+ if (ret)
+ return ret;

regmap = qcom_cc_map(pdev, &gpu_cc_sc8280xp_desc);
- if (IS_ERR(regmap))
+ if (IS_ERR(regmap)) {
+ pm_runtime_put(&pdev->dev);
return PTR_ERR(regmap);
+ }

clk_lucid_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config);
clk_lucid_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config);
@@ -439,7 +451,10 @@ static int gpu_cc_sc8280xp_probe(struct platform_device *pdev)
regmap_update_bits(regmap, 0x1170, BIT(0), BIT(0));
regmap_update_bits(regmap, 0x109c, BIT(0), BIT(0));

- return qcom_cc_really_probe(pdev, &gpu_cc_sc8280xp_desc, regmap);
+ ret = qcom_cc_really_probe(pdev, &gpu_cc_sc8280xp_desc, regmap);
+ pm_runtime_put(&pdev->dev);
+
+ return ret;
}

static const struct of_device_id gpu_cc_sc8280xp_match_table[] = {

--
2.41.0

2023-06-19 16:22:09

by Konrad Dybcio

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Subject: [PATCH 2/2] clk: qcom: gcc-sc8280xp: Add runtime PM

The GCC block on SC8280XP is powered by the CX rail. We need to ensure
that it's enabled to prevent unwanted power collapse.

Enable runtime PM to keep the power flowing only when necessary.

Signed-off-by: Konrad Dybcio <[email protected]>
---
drivers/clk/qcom/gcc-sc8280xp.c | 18 ++++++++++++++++--
1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/qcom/gcc-sc8280xp.c b/drivers/clk/qcom/gcc-sc8280xp.c
index 04a99dbaa57e..b90c71637814 100644
--- a/drivers/clk/qcom/gcc-sc8280xp.c
+++ b/drivers/clk/qcom/gcc-sc8280xp.c
@@ -9,6 +9,7 @@
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of_device.h>
+#include <linux/pm_runtime.h>
#include <linux/of.h>
#include <linux/regmap.h>

@@ -7421,9 +7422,19 @@ static int gcc_sc8280xp_probe(struct platform_device *pdev)
struct regmap *regmap;
int ret;

+ ret = devm_pm_runtime_enable(&pdev->dev);
+ if (ret)
+ return ret;
+
+ ret = pm_runtime_resume_and_get(&pdev->dev);
+ if (ret)
+ return ret;
+
regmap = qcom_cc_map(pdev, &gcc_sc8280xp_desc);
- if (IS_ERR(regmap))
+ if (IS_ERR(regmap)) {
+ pm_runtime_put(&pdev->dev);
return PTR_ERR(regmap);
+ }

/*
* Keep the clocks always-ON
@@ -7445,7 +7456,10 @@ static int gcc_sc8280xp_probe(struct platform_device *pdev)
if (ret)
return ret;

- return qcom_cc_really_probe(pdev, &gcc_sc8280xp_desc, regmap);
+ ret = qcom_cc_really_probe(pdev, &gcc_sc8280xp_desc, regmap);
+ pm_runtime_put(&pdev->dev);
+
+ return ret;
}

static const struct of_device_id gcc_sc8280xp_match_table[] = {

--
2.41.0

2023-06-22 20:59:01

by Bjorn Andersson

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Subject: Re: [PATCH 0/2] SC8280XP clock runtime pm

On Mon, 19 Jun 2023 18:13:16 +0200, Konrad Dybcio wrote:
> Keeping power domains always enabled hinders power efficiency. Add runtime
> PM to 8280 clock controllers to prevent that.
>
>

Applied, thanks!

[1/2] clk: qcom: gpucc-sc8280xp: Add runtime PM
commit: 9bbcb892a7cd06c8156e6de211a8d7d45ee48086
[2/2] clk: qcom: gcc-sc8280xp: Add runtime PM
commit: 2a541abd98370f9931c889c187eef7458720b57b

Best regards,
--
Bjorn Andersson <[email protected]>

2023-06-26 19:38:05

by Bjorn Andersson

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