This series fixes a number of runtime PM related bugs found through
inspection.
Johan
Johan Hovold (8):
clk: qcom: camcc-sc7180: fix async resume during probe
clk: qcom: dispcc-sm8450: fix runtime PM imbalance on probe errors
clk: qcom: dispcc-sm8550: fix runtime PM imbalance on probe errors
clk: qcom: gcc-sc8280xp: fix runtime PM imbalance on probe errors
clk: qcom: lpasscc-sc7280: fix missing resume during probe
clk: qcom: q6sstop-qcs404: fix missing resume during probe
clk: qcom: mss-sc7180: fix missing resume during probe
clk: qcom: turingcc-qcs404: fix missing resume during probe
drivers/clk/qcom/camcc-sc7180.c | 2 +-
drivers/clk/qcom/dispcc-sm8450.c | 13 +++++++++++--
drivers/clk/qcom/dispcc-sm8550.c | 13 +++++++++++--
drivers/clk/qcom/gcc-sc8280xp.c | 14 +++++++++++---
drivers/clk/qcom/lpasscc-sc7280.c | 16 ++++++++++++----
drivers/clk/qcom/mss-sc7180.c | 13 ++++++++++++-
drivers/clk/qcom/q6sstop-qcs404.c | 15 +++++++++++++--
drivers/clk/qcom/turingcc-qcs404.c | 13 ++++++++++++-
8 files changed, 83 insertions(+), 16 deletions(-)
--
2.41.0
Drivers that enable runtime PM must make sure that the controller is
runtime resumed before accessing its registers to prevent the power
domain from being disabled.
Fixes: 8def929c4097 ("clk: qcom: Add modem clock controller driver for SC7180")
Cc: [email protected] # 5.7
Cc: Taniya Das <[email protected]>
Signed-off-by: Johan Hovold <[email protected]>
---
drivers/clk/qcom/mss-sc7180.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/mss-sc7180.c b/drivers/clk/qcom/mss-sc7180.c
index 5a1407440662..d106bc65470e 100644
--- a/drivers/clk/qcom/mss-sc7180.c
+++ b/drivers/clk/qcom/mss-sc7180.c
@@ -87,11 +87,22 @@ static int mss_sc7180_probe(struct platform_device *pdev)
return ret;
}
+ ret = pm_runtime_resume_and_get(&pdev->dev);
+ if (ret)
+ return ret;
+
ret = qcom_cc_probe(pdev, &mss_sc7180_desc);
if (ret < 0)
- return ret;
+ goto err_put_rpm;
+
+ pm_runtime_put(&pdev->dev);
return 0;
+
+err_put_rpm:
+ pm_runtime_put_sync(&pdev->dev);
+
+ return ret;
}
static const struct dev_pm_ops mss_sc7180_pm_ops = {
--
2.41.0
Make sure to decrement the runtime PM usage count before returning in
case regmap initialisation fails.
Fixes: 90114ca11476 ("clk: qcom: add SM8550 DISPCC driver")
Cc: [email protected] # 6.3
Cc: Neil Armstrong <[email protected]>
Signed-off-by: Johan Hovold <[email protected]>
---
drivers/clk/qcom/dispcc-sm8550.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/qcom/dispcc-sm8550.c b/drivers/clk/qcom/dispcc-sm8550.c
index 1e5a11081860..b2fae9001ff2 100644
--- a/drivers/clk/qcom/dispcc-sm8550.c
+++ b/drivers/clk/qcom/dispcc-sm8550.c
@@ -1761,8 +1761,10 @@ static int disp_cc_sm8550_probe(struct platform_device *pdev)
return ret;
regmap = qcom_cc_map(pdev, &disp_cc_sm8550_desc);
- if (IS_ERR(regmap))
- return PTR_ERR(regmap);
+ if (IS_ERR(regmap)) {
+ ret = PTR_ERR(regmap);
+ goto err_put_rpm;
+ }
clk_lucid_evo_pll_configure(&disp_cc_pll0, regmap, &disp_cc_pll0_config);
clk_lucid_evo_pll_configure(&disp_cc_pll1, regmap, &disp_cc_pll1_config);
@@ -1777,9 +1779,16 @@ static int disp_cc_sm8550_probe(struct platform_device *pdev)
regmap_update_bits(regmap, 0xe054, BIT(0), BIT(0));
ret = qcom_cc_really_probe(pdev, &disp_cc_sm8550_desc, regmap);
+ if (ret)
+ goto err_put_rpm;
pm_runtime_put(&pdev->dev);
+ return 0;
+
+err_put_rpm:
+ pm_runtime_put_sync(&pdev->dev);
+
return ret;
}
--
2.41.0
To make sure that the controller is runtime resumed and its power domain
is enabled before accessing its registers during probe, the synchronous
runtime PM interface must be used.
Fixes: 8d4025943e13 ("clk: qcom: camcc-sc7180: Use runtime PM ops instead of clk ones")
Cc: [email protected] # 5.11
Cc: Stephen Boyd <[email protected]>
Signed-off-by: Johan Hovold <[email protected]>
---
drivers/clk/qcom/camcc-sc7180.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/camcc-sc7180.c b/drivers/clk/qcom/camcc-sc7180.c
index 8a4ba7a19ed1..6f56bdbf0204 100644
--- a/drivers/clk/qcom/camcc-sc7180.c
+++ b/drivers/clk/qcom/camcc-sc7180.c
@@ -1664,7 +1664,7 @@ static int cam_cc_sc7180_probe(struct platform_device *pdev)
return ret;
}
- ret = pm_runtime_get(&pdev->dev);
+ ret = pm_runtime_resume_and_get(&pdev->dev);
if (ret)
return ret;
--
2.41.0
Make sure to decrement the runtime PM usage count before returning in
case regmap initialisation fails.
Fixes: 16fb89f92ec4 ("clk: qcom: Add support for Display Clock Controller on SM8450")
Cc: [email protected] # 6.1
Cc: Dmitry Baryshkov <[email protected]>
Signed-off-by: Johan Hovold <[email protected]>
---
drivers/clk/qcom/dispcc-sm8450.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/qcom/dispcc-sm8450.c b/drivers/clk/qcom/dispcc-sm8450.c
index adbfd30bfc96..84db4ff5485a 100644
--- a/drivers/clk/qcom/dispcc-sm8450.c
+++ b/drivers/clk/qcom/dispcc-sm8450.c
@@ -1776,8 +1776,10 @@ static int disp_cc_sm8450_probe(struct platform_device *pdev)
return ret;
regmap = qcom_cc_map(pdev, &disp_cc_sm8450_desc);
- if (IS_ERR(regmap))
- return PTR_ERR(regmap);
+ if (IS_ERR(regmap)) {
+ ret = PTR_ERR(regmap);
+ goto err_put_rpm;
+ }
clk_lucid_evo_pll_configure(&disp_cc_pll0, regmap, &disp_cc_pll0_config);
clk_lucid_evo_pll_configure(&disp_cc_pll1, regmap, &disp_cc_pll1_config);
@@ -1792,9 +1794,16 @@ static int disp_cc_sm8450_probe(struct platform_device *pdev)
regmap_update_bits(regmap, 0xe05c, BIT(0), BIT(0));
ret = qcom_cc_really_probe(pdev, &disp_cc_sm8450_desc, regmap);
+ if (ret)
+ goto err_put_rpm;
pm_runtime_put(&pdev->dev);
+ return 0;
+
+err_put_rpm:
+ pm_runtime_put_sync(&pdev->dev);
+
return ret;
}
--
2.41.0
Drivers that enable runtime PM must make sure that the controller is
runtime resumed before accessing its registers to prevent the power
domain from being disabled.
Fixes: 892df0191b29 ("clk: qcom: Add QCS404 TuringCC")
Cc: [email protected] # 5.2
Cc: Bjorn Andersson <[email protected]>
Signed-off-by: Johan Hovold <[email protected]>
---
drivers/clk/qcom/turingcc-qcs404.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/turingcc-qcs404.c b/drivers/clk/qcom/turingcc-qcs404.c
index 43184459228f..2cd288d6c3e4 100644
--- a/drivers/clk/qcom/turingcc-qcs404.c
+++ b/drivers/clk/qcom/turingcc-qcs404.c
@@ -125,11 +125,22 @@ static int turingcc_probe(struct platform_device *pdev)
return ret;
}
+ ret = pm_runtime_resume_and_get(&pdev->dev);
+ if (ret)
+ return ret;
+
ret = qcom_cc_probe(pdev, &turingcc_desc);
if (ret < 0)
- return ret;
+ goto err_put_rpm;
+
+ pm_runtime_put(&pdev->dev);
return 0;
+
+err_put_rpm:
+ pm_runtime_put_sync(&pdev->dev);
+
+ return ret;
}
static const struct dev_pm_ops turingcc_pm_ops = {
--
2.41.0
On 18.07.2023 15:28, Johan Hovold wrote:
> This series fixes a number of runtime PM related bugs found through
> inspection.
>
> Johan
I was thinking whether we should maybe incorporate RPM enablement
into qcom common functions.. The only issue I see is that some
clocks register pm clocks atop that, but I guess we could introduce
some sort of a pm_clks names array to solve that?
Konrad
On Tue, 18 Jul 2023 15:28:54 +0200, Johan Hovold wrote:
> This series fixes a number of runtime PM related bugs found through
> inspection.
>
> Johan
>
>
> Johan Hovold (8):
> clk: qcom: camcc-sc7180: fix async resume during probe
> clk: qcom: dispcc-sm8450: fix runtime PM imbalance on probe errors
> clk: qcom: dispcc-sm8550: fix runtime PM imbalance on probe errors
> clk: qcom: gcc-sc8280xp: fix runtime PM imbalance on probe errors
> clk: qcom: lpasscc-sc7280: fix missing resume during probe
> clk: qcom: q6sstop-qcs404: fix missing resume during probe
> clk: qcom: mss-sc7180: fix missing resume during probe
> clk: qcom: turingcc-qcs404: fix missing resume during probe
>
> [...]
Applied, thanks!
[1/8] clk: qcom: camcc-sc7180: fix async resume during probe
commit: c948ff727e25297f3a703eb5349dd66aabf004e4
[2/8] clk: qcom: dispcc-sm8450: fix runtime PM imbalance on probe errors
commit: b0f3d01bda6c3f6f811e70f76d2040ae81f64565
[3/8] clk: qcom: dispcc-sm8550: fix runtime PM imbalance on probe errors
commit: acaf1b3296a504d4a61b685f78baae771421608d
[4/8] clk: qcom: gcc-sc8280xp: fix runtime PM imbalance on probe errors
commit: 10192ab375c39c58d39cba028d9685cefe1ca3c2
[5/8] clk: qcom: lpasscc-sc7280: fix missing resume during probe
commit: 66af5339d4f8e20c6d89a490570bd94d40f1a7f6
[6/8] clk: qcom: q6sstop-qcs404: fix missing resume during probe
commit: 97112c83f4671a4a722f99a53be4e91fac4091bc
[7/8] clk: qcom: mss-sc7180: fix missing resume during probe
commit: e2349da0fa7ca822cda72f427345b95795358fe7
[8/8] clk: qcom: turingcc-qcs404: fix missing resume during probe
commit: a9f71a033587c9074059132d34c74eabbe95ef26
Best regards,
--
Bjorn Andersson <[email protected]>
On Tue, Jul 18, 2023 at 03:46:03PM +0200, Konrad Dybcio wrote:
> On 18.07.2023 15:28, Johan Hovold wrote:
> > This series fixes a number of runtime PM related bugs found through
> > inspection.
> I was thinking whether we should maybe incorporate RPM enablement
> into qcom common functions.. The only issue I see is that some
> clocks register pm clocks atop that, but I guess we could introduce
> some sort of a pm_clks names array to solve that?
Possibly, but you currently also have the hardcoded clock enables and
some other variations.
Johan